1 TI CPUFreq and OPP bindings
2 ================================
3
4 Certain TI SoCs, like those in the am335x, am437x, am57xx, and dra7xx
5 families support different OPPs depending on the silicon variant in use.
6 The ti-cpufreq driver can use revision and an efuse value from the SoC to
7 provide the OPP framework with supported hardware information. This is
8 used to determine which OPPs from the operating-points-v2 table get enabled
9 when it is parsed by the OPP framework.
10
11 Required properties:
12 --------------------
13 In 'cpus' nodes:
14 - operating-points-v2: Phandle to the operating-points-v2 table to use.
15
16 In 'operating-points-v2' table:
17 - compatible: Should be
18 - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,
19 omap34xx, omap36xx and am3517 SoCs
20 - syscon: A phandle pointing to a syscon node representing the control module
21 register space of the SoC.
22
23 Optional properties:
24 --------------------
25 - "vdd-supply", "vbb-supply": to define two regulators for dra7xx
26 - "cpu0-supply", "vbb-supply": to define two regulators for omap36xx
27
28 For each opp entry in 'operating-points-v2' table:
29 - opp-supported-hw: Two bitfields indicating:
30 1. Which revision of the SoC the OPP is supported by
31 2. Which eFuse bits indicate this OPP is available
32
33 A bitwise AND is performed against these values and if any bit
34 matches, the OPP gets enabled.
35
36 Example:
37 --------
38
39 /* From arch/arm/boot/dts/am33xx.dtsi */
40 cpus {
41 #address-cells = <1>;
42 #size-cells = <0>;
43 cpu@0 {
44 compatible = "arm,cortex-a8";
45 device_type = "cpu";
46 reg = <0>;
47
48 operating-points-v2 = <&cpu0_opp_table>;
49
50 clocks = <&dpll_mpu_ck>;
51 clock-names = "cpu";
52
53 clock-latency = <300000>; /* From omap-cpufreq driver */
54 };
55 };
56
57 /*
58 * cpu0 has different OPPs depending on SoC revision and some on revisions
59 * 0x2 and 0x4 have eFuse bits that indicate if they are available or not
60 */
61 cpu0_opp_table: opp-table {
62 compatible = "operating-points-v2-ti-cpu";
63 syscon = <&scm_conf>;
64
65 /*
66 * The three following nodes are marked with opp-suspend
67 * because they can not be enabled simultaneously on a
68 * single SoC.
69 */
70 opp50-300000000 {
71 opp-hz = /bits/ 64 <300000000>;
72 opp-microvolt = <950000 931000 969000>;
73 opp-supported-hw = <0x06 0x0010>;
74 opp-suspend;
75 };
76
77 opp100-275000000 {
78 opp-hz = /bits/ 64 <275000000>;
79 opp-microvolt = <1100000 1078000 1122000>;
80 opp-supported-hw = <0x01 0x00FF>;
81 opp-suspend;
82 };
83
84 opp100-300000000 {
85 opp-hz = /bits/ 64 <300000000>;
86 opp-microvolt = <1100000 1078000 1122000>;
87 opp-supported-hw = <0x06 0x0020>;
88 opp-suspend;
89 };
90
91 opp100-500000000 {
92 opp-hz = /bits/ 64 <500000000>;
93 opp-microvolt = <1100000 1078000 1122000>;
94 opp-supported-hw = <0x01 0xFFFF>;
95 };
96
97 opp100-600000000 {
98 opp-hz = /bits/ 64 <600000000>;
99 opp-microvolt = <1100000 1078000 1122000>;
100 opp-supported-hw = <0x06 0x0040>;
101 };
102
103 opp120-600000000 {
104 opp-hz = /bits/ 64 <600000000>;
105 opp-microvolt = <1200000 1176000 1224000>;
106 opp-supported-hw = <0x01 0xFFFF>;
107 };
108
109 opp120-720000000 {
110 opp-hz = /bits/ 64 <720000000>;
111 opp-microvolt = <1200000 1176000 1224000>;
112 opp-supported-hw = <0x06 0x0080>;
113 };
114
115 oppturbo-720000000 {
116 opp-hz = /bits/ 64 <720000000>;
117 opp-microvolt = <1260000 1234800 1285200>;
118 opp-supported-hw = <0x01 0xFFFF>;
119 };
120
121 oppturbo-800000000 {
122 opp-hz = /bits/ 64 <800000000>;
123 opp-microvolt = <1260000 1234800 1285200>;
124 opp-supported-hw = <0x06 0x0100>;
125 };
126
127 oppnitro-1000000000 {
128 opp-hz = /bits/ 64 <1000000000>;
129 opp-microvolt = <1325000 1298500 1351500>;
130 opp-supported-hw = <0x04 0x0200>;
131 };
132 };
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