1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Freescale i.MX8MP DPI to LVDS bridge chip
8
9 maintainers:
10 - Marek Vasut <marex@denx.de>
11
12 description: |
13 The i.MX8MP mediamix contains two registers which are responsible
14 for configuring the on-SoC DPI-to-LVDS serializer. This describes
15 those registers as bridge within the DT.
16
17 properties:
18 compatible:
19 const: fsl,imx8mp-ldb
20
21 clocks:
22 maxItems: 1
23
24 clock-names:
25 const: ldb
26
27 reg:
28 minItems: 2
29 maxItems: 2
30
31 reg-names:
32 items:
33 - const: ldb
34 - const: lvds
35
36 ports:
37 $ref: /schemas/graph.yaml#/properties/ports
38
39 properties:
40 port@0:
41 $ref: /schemas/graph.yaml#/properties/port
42 description: Video port for DPI input.
43
44 port@1:
45 $ref: /schemas/graph.yaml#/properties/port
46 description: Video port for LVDS Channel-A output (panel or bridge).
47
48 port@2:
49 $ref: /schemas/graph.yaml#/properties/port
50 description: Video port for LVDS Channel-B output (panel or bridge).
51
52 required:
53 - port@0
54 - port@1
55
56 required:
57 - compatible
58 - clocks
59 - ports
60
61 additionalProperties: false
62
63 examples:
64 - |
65 #include <dt-bindings/clock/imx8mp-clock.h>
66
67 blk-ctrl {
68 #address-cells = <1>;
69 #size-cells = <1>;
70
71 bridge@5c {
72 compatible = "fsl,imx8mp-ldb";
73 clocks = <&clk IMX8MP_CLK_MEDIA_LDB>;
74 clock-names = "ldb";
75 reg = <0x5c 0x4>, <0x128 0x4>;
76 reg-names = "ldb", "lvds";
77
78 ports {
79 #address-cells = <1>;
80 #size-cells = <0>;
81
82 port@0 {
83 reg = <0>;
84
85 ldb_from_lcdif2: endpoint {
86 remote-endpoint = <&lcdif2_to_ldb>;
87 };
88 };
89
90 port@1 {
91 reg = <1>;
92
93 ldb_lvds_ch0: endpoint {
94 remote-endpoint = <&ldb_to_lvdsx4panel>;
95 };
96 };
97
98 port@2 {
99 reg = <2>;
100
101 ldb_lvds_ch1: endpoint {
102 };
103 };
104 };
105 };
106 };
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