The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/display/exynos/exynos_dp.txt

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    1 The Exynos display port interface should be configured based on
    2 the type of panel connected to it.
    3 
    4 We use two nodes:
    5         -dp-controller node
    6         -dptx-phy node(defined inside dp-controller node)
    7 
    8 For the DP-PHY initialization, we use the dptx-phy node.
    9 Required properties for dptx-phy: deprecated, use phys and phy-names
   10         -reg: deprecated
   11                 Base address of DP PHY register.
   12         -samsung,enable-mask: deprecated
   13                 The bit-mask used to enable/disable DP PHY.
   14 
   15 For the Panel initialization, we read data from dp-controller node.
   16 Required properties for dp-controller:
   17         -compatible:
   18                 should be "samsung,exynos5-dp".
   19         -reg:
   20                 physical base address of the controller and length
   21                 of memory mapped region.
   22         -interrupts:
   23                 interrupt combiner values.
   24         -clocks:
   25                 from common clock binding: handle to dp clock.
   26         -clock-names:
   27                 from common clock binding: Shall be "dp".
   28         -phys:
   29                 from general PHY binding: the phandle for the PHY device.
   30         -phy-names:
   31                 from general PHY binding: Should be "dp".
   32 
   33 Optional properties for dp-controller:
   34         -interlaced:
   35                 interlace scan mode.
   36                         Progressive if defined, Interlaced if not defined
   37         -vsync-active-high:
   38                 VSYNC polarity configuration.
   39                         High if defined, Low if not defined
   40         -hsync-active-high:
   41                 HSYNC polarity configuration.
   42                         High if defined, Low if not defined
   43         -samsung,hpd-gpio:
   44                 Hotplug detect GPIO.
   45                         Indicates which GPIO should be used for hotplug
   46                         detection
   47         -video interfaces: Device node can contain video interface port
   48                         nodes according to [1].
   49         - display-timings: timings for the connected panel as described by
   50                 Documentation/devicetree/bindings/display/panel/display-timing.txt
   51 
   52 For the below properties, please refer to Analogix DP binding document:
   53  * Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
   54         -phys (required)
   55         -phy-names (required)
   56         -hpd-gpios (optional)
   57          force-hpd (optional)
   58 
   59 Deprecated properties for DisplayPort:
   60 -interlaced:            deprecated prop that can parsed from drm_display_mode.
   61 -vsync-active-high:     deprecated prop that can parsed from drm_display_mode.
   62 -hsync-active-high:     deprecated prop that can parsed from drm_display_mode.
   63 -samsung,ycbcr-coeff:   deprecated prop that can parsed from drm_display_mode.
   64 -samsung,dynamic-range: deprecated prop that can parsed from drm_display_mode.
   65 -samsung,color-space:   deprecated prop that can parsed from drm_display_info.
   66 -samsung,color-depth:   deprecated prop that can parsed from drm_display_info.
   67 -samsung,link-rate:     deprecated prop that can reading from monitor by dpcd method.
   68 -samsung,lane-count:    deprecated prop that can reading from monitor by dpcd method.
   69 -samsung,hpd-gpio:      deprecated name for hpd-gpios.
   70 
   71 -------------------------------------------------------------------------------
   72 
   73 Example:
   74 
   75 SOC specific portion:
   76         dp-controller {
   77                 compatible = "samsung,exynos5-dp";
   78                 reg = <0x145b0000 0x10000>;
   79                 interrupts = <10 3>;
   80                 interrupt-parent = <&combiner>;
   81                 clocks = <&clock 342>;
   82                 clock-names = "dp";
   83 
   84                 phys = <&dp_phy>;
   85                 phy-names = "dp";
   86         };
   87 
   88 Board Specific portion:
   89         dp-controller {
   90                 display-timings {
   91                         native-mode = <&lcd_timing>;
   92                         lcd_timing: 1366x768 {
   93                                 clock-frequency = <70589280>;
   94                                 hactive = <1366>;
   95                                 vactive = <768>;
   96                                 hfront-porch = <40>;
   97                                 hback-porch = <40>;
   98                                 hsync-len = <32>;
   99                                 vback-porch = <10>;
  100                                 vfront-porch = <12>;
  101                                 vsync-len = <6>;
  102                         };
  103                 };
  104 
  105                 ports {
  106                         port@0 {
  107                                 dp_out: endpoint {
  108                                         remote-endpoint = <&bridge_in>;
  109                                 };
  110                         };
  111                 };
  112         };

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