The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/display/exynos/samsung-fimd.txt

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    1 Device-Tree bindings for Samsung SoC display controller (FIMD)
    2 
    3 FIMD (Fully Interactive Mobile Display) is the Display Controller for the
    4 Samsung series of SoCs which transfers the image data from a video memory
    5 buffer to an external LCD interface.
    6 
    7 Required properties:
    8 - compatible: value should be one of the following
    9                 "samsung,s3c2443-fimd"; /* for S3C24XX SoCs */
   10                 "samsung,s3c6400-fimd"; /* for S3C64XX SoCs */
   11                 "samsung,s5pv210-fimd"; /* for S5PV210 SoC */
   12                 "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */
   13                 "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
   14                 "samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */
   15                 "samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */
   16 
   17 - reg: physical base address and length of the FIMD registers set.
   18 
   19 - interrupts: should contain a list of all FIMD IP block interrupts in the
   20                  order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
   21                  format depends on the interrupt controller used.
   22 
   23 - interrupt-names: should contain the interrupt names: "fifo", "vsync",
   24         "lcd_sys", in the same order as they were listed in the interrupts
   25         property.
   26 
   27 - pinctrl-0: pin control group to be used for this controller.
   28 
   29 - pinctrl-names: must contain a "default" entry.
   30 
   31 - clocks: must include clock specifiers corresponding to entries in the
   32          clock-names property.
   33 
   34 - clock-names: list of clock names sorted in the same order as the clocks
   35                property. Must contain "sclk_fimd" and "fimd".
   36 
   37 Optional Properties:
   38 - power-domains: a phandle to FIMD power domain node.
   39 - samsung,invert-vden: video enable signal is inverted
   40 - samsung,invert-vclk: video clock signal is inverted
   41 - display-timings: timing settings for FIMD, as described in document [1].
   42                 Can be used in case timings cannot be provided otherwise
   43                 or to override timings provided by the panel.
   44 - samsung,sysreg: handle to syscon used to control the system registers
   45 - i80-if-timings: timing configuration for lcd i80 interface support.
   46   - cs-setup: clock cycles for the active period of address signal is enabled
   47               until chip select is enabled.
   48               If not specified, the default value(0) will be used.
   49   - wr-setup: clock cycles for the active period of CS signal is enabled until
   50               write signal is enabled.
   51               If not specified, the default value(0) will be used.
   52   - wr-active: clock cycles for the active period of CS is enabled.
   53                If not specified, the default value(1) will be used.
   54   - wr-hold: clock cycles for the active period of CS is disabled until write
   55              signal is disabled.
   56              If not specified, the default value(0) will be used.
   57 
   58   The parameters are defined as:
   59 
   60     VCLK(internal)  __|??????|_____|??????|_____|??????|_____|??????|_____|??
   61                       :            :            :            :            :
   62     Address Output  --:<XXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XXXXXXXXXXXX:XX
   63                       | cs-setup+1 |            :            :            :
   64                       |<---------->|            :            :            :
   65     Chip Select     ???????????????|____________:____________:____________|??
   66                                    | wr-setup+1 |            | wr-hold+1  |
   67                                    |<---------->|            |<---------->|
   68     Write Enable    ????????????????????????????|____________|???????????????
   69                                                 | wr-active+1|
   70                                                 |<---------->|
   71     Video Data      ----------------------------<XXXXXXXXXXXXXXXXXXXXXXXXX>--
   72 
   73 The device node can contain 'port' child nodes according to the bindings defined
   74 in [2]. The following are properties specific to those nodes:
   75 - reg: (required) port index, can be:
   76                 0 - for CAMIF0 input,
   77                 1 - for CAMIF1 input,
   78                 2 - for CAMIF2 input,
   79                 3 - for parallel output,
   80                 4 - for write-back interface
   81 
   82 [1]: Documentation/devicetree/bindings/display/panel/display-timing.txt
   83 [2]: Documentation/devicetree/bindings/media/video-interfaces.txt
   84 
   85 Example:
   86 
   87 SoC specific DT entry:
   88 
   89         fimd@11c00000 {
   90                 compatible = "samsung,exynos4210-fimd";
   91                 interrupt-parent = <&combiner>;
   92                 reg = <0x11c00000 0x20000>;
   93                 interrupt-names = "fifo", "vsync", "lcd_sys";
   94                 interrupts = <11 0>, <11 1>, <11 2>;
   95                 clocks = <&clock 140>, <&clock 283>;
   96                 clock-names = "sclk_fimd", "fimd";
   97                 power-domains = <&pd_lcd0>;
   98                 status = "disabled";
   99         };
  100 
  101 Board specific DT entry:
  102 
  103         fimd@11c00000 {
  104                 pinctrl-0 = <&lcd_clk &lcd_data24 &pwm1_out>;
  105                 pinctrl-names = "default";
  106                 status = "okay";
  107         };

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