The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/display/mediatek/mediatek,aal.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,aal.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Mediatek display adaptive ambient light processor
    8 
    9 maintainers:
   10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
   11   - Philipp Zabel <p.zabel@pengutronix.de>
   12 
   13 description: |
   14   Mediatek display adaptive ambient light processor, namely AAL,
   15   is responsible for backlight power saving and sunlight visibility improving.
   16   AAL device node must be siblings to the central MMSYS_CONFIG node.
   17   For a description of the MMSYS_CONFIG binding, see
   18   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
   19   for details.
   20 
   21 properties:
   22   compatible:
   23     oneOf:
   24       - enum:
   25           - mediatek,mt8173-disp-aal
   26           - mediatek,mt8183-disp-aal
   27       - items:
   28           - enum:
   29               - mediatek,mt2712-disp-aal
   30           - const: mediatek,mt8173-disp-aal
   31       - items:
   32           - enum:
   33               - mediatek,mt8186-disp-aal
   34               - mediatek,mt8192-disp-aal
   35               - mediatek,mt8195-disp-aal
   36           - const: mediatek,mt8183-disp-aal
   37 
   38   reg:
   39     maxItems: 1
   40 
   41   interrupts:
   42     maxItems: 1
   43 
   44   power-domains:
   45     description: A phandle and PM domain specifier as defined by bindings of
   46       the power controller specified by phandle. See
   47       Documentation/devicetree/bindings/power/power-domain.yaml for details.
   48 
   49   clocks:
   50     items:
   51       - description: AAL Clock
   52 
   53   mediatek,gce-client-reg:
   54     description: The register of client driver can be configured by gce with
   55       4 arguments defined in this property, such as phandle of gce, subsys id,
   56       register offset and size. Each GCE subsys id is mapping to a client
   57       defined in the header include/dt-bindings/gce/<chip>-gce.h.
   58     $ref: /schemas/types.yaml#/definitions/phandle-array
   59     maxItems: 1
   60 
   61 required:
   62   - compatible
   63   - reg
   64   - interrupts
   65   - power-domains
   66   - clocks
   67 
   68 additionalProperties: false
   69 
   70 examples:
   71   - |
   72     #include <dt-bindings/interrupt-controller/arm-gic.h>
   73     #include <dt-bindings/clock/mt8173-clk.h>
   74     #include <dt-bindings/power/mt8173-power.h>
   75     #include <dt-bindings/gce/mt8173-gce.h>
   76 
   77     soc {
   78         #address-cells = <2>;
   79         #size-cells = <2>;
   80 
   81         aal@14015000 {
   82            compatible = "mediatek,mt8173-disp-aal";
   83            reg = <0 0x14015000 0 0x1000>;
   84            interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_LOW>;
   85            power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
   86            clocks = <&mmsys CLK_MM_DISP_AAL>;
   87            mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
   88        };
   89     };

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