mediatek,color.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,color.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Mediatek display color processor
    8 
    9 maintainers:
   10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
   11   - Philipp Zabel <p.zabel@pengutronix.de>
   12 
   13 description: |
   14   Mediatek display color processor, namely COLOR, provides hue, luma and
   15   saturation adjustments to get better picture quality and to have one panel
   16   resemble the other in their output characteristics.
   17   COLOR device node must be siblings to the central MMSYS_CONFIG node.
   18   For a description of the MMSYS_CONFIG binding, see
   19   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
   20   for details.
   21 
   22 properties:
   23   compatible:
   24     oneOf:
   25       - items:
   26           - const: mediatek,mt2701-disp-color
   27       - items:
   28           - const: mediatek,mt8167-disp-color
   29       - items:
   30           - const: mediatek,mt8173-disp-color
   31       - items:
   32           - enum:
   33               - mediatek,mt7623-disp-color
   34               - mediatek,mt2712-disp-color
   35           - const: mediatek,mt2701-disp-color
   36       - items:
   37           - enum:
   38               - mediatek,mt8183-disp-color
   39               - mediatek,mt8186-disp-color
   40               - mediatek,mt8192-disp-color
   41               - mediatek,mt8195-disp-color
   42           - const: mediatek,mt8173-disp-color
   43   reg:
   44     maxItems: 1
   45 
   46   interrupts:
   47     maxItems: 1
   48 
   49   power-domains:
   50     description: A phandle and PM domain specifier as defined by bindings of
   51       the power controller specified by phandle. See
   52       Documentation/devicetree/bindings/power/power-domain.yaml for details.
   53 
   54   clocks:
   55     items:
   56       - description: COLOR Clock
   57 
   58   mediatek,gce-client-reg:
   59     description: The register of client driver can be configured by gce with
   60       4 arguments defined in this property, such as phandle of gce, subsys id,
   61       register offset and size. Each GCE subsys id is mapping to a client
   62       defined in the header include/dt-bindings/gce/<chip>-gce.h.
   63     $ref: /schemas/types.yaml#/definitions/phandle-array
   64     maxItems: 1
   65 
   66 required:
   67   - compatible
   68   - reg
   69   - interrupts
   70   - power-domains
   71   - clocks
   72 
   73 additionalProperties: false
   74 
   75 examples:
   76   - |
   77     #include <dt-bindings/interrupt-controller/arm-gic.h>
   78     #include <dt-bindings/clock/mt8173-clk.h>
   79     #include <dt-bindings/power/mt8173-power.h>
   80     #include <dt-bindings/gce/mt8173-gce.h>
   81 
   82     soc {
   83         #address-cells = <2>;
   84         #size-cells = <2>;
   85 
   86         color0: color@14013000 {
   87             compatible = "mediatek,mt8173-disp-color";
   88             reg = <0 0x14013000 0 0x1000>;
   89             interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_LOW>;
   90             power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
   91             clocks = <&mmsys CLK_MM_DISP_COLOR0>;
   92             mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x3000 0x1000>;
   93         };
   94     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/display/mediatek/mediatek,color.yaml

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sys/contrib/device-tree/Bindings/display/mediatek/mediatek,color.yaml