mediatek,mdp-rdma.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: MediaTek MDP RDMA
    8 
    9 maintainers:
   10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
   11   - Philipp Zabel <p.zabel@pengutronix.de>
   12 
   13 description:
   14   The MediaTek MDP RDMA stands for Read Direct Memory Access.
   15   It provides real time data to the back-end panel driver, such as DSI,
   16   DPI and DP_INTF.
   17   It contains one line buffer to store the sufficient pixel data.
   18   RDMA device node must be siblings to the central MMSYS_CONFIG node.
   19   For a description of the MMSYS_CONFIG binding, see
   20   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details.
   21 
   22 properties:
   23   compatible:
   24     const: mediatek,mt8195-vdo1-rdma
   25 
   26   reg:
   27     maxItems: 1
   28 
   29   interrupts:
   30     maxItems: 1
   31 
   32   power-domains:
   33     maxItems: 1
   34 
   35   clocks:
   36     items:
   37       - description: RDMA Clock
   38 
   39   iommus:
   40     maxItems: 1
   41 
   42   mediatek,gce-client-reg:
   43     description:
   44       The register of display function block to be set by gce. There are 4 arguments,
   45       such as gce node, subsys id, offset and register size. The subsys id that is
   46       mapping to the register of display function blocks is defined in the gce header
   47       include/dt-bindings/gce/<chip>-gce.h of each chips.
   48     $ref: /schemas/types.yaml#/definitions/phandle-array
   49     items:
   50       items:
   51         - description: phandle of GCE
   52         - description: GCE subsys id
   53         - description: register offset
   54         - description: register size
   55     maxItems: 1
   56 
   57 required:
   58   - compatible
   59   - reg
   60   - power-domains
   61   - clocks
   62   - iommus
   63   - mediatek,gce-client-reg
   64 
   65 additionalProperties: false
   66 
   67 examples:
   68   - |
   69     #include <dt-bindings/interrupt-controller/arm-gic.h>
   70     #include <dt-bindings/clock/mt8195-clk.h>
   71     #include <dt-bindings/power/mt8195-power.h>
   72     #include <dt-bindings/gce/mt8195-gce.h>
   73     #include <dt-bindings/memory/mt8195-memory-port.h>
   74 
   75     soc {
   76         #address-cells = <2>;
   77         #size-cells = <2>;
   78 
   79         rdma@1c104000 {
   80             compatible = "mediatek,mt8195-vdo1-rdma";
   81             reg = <0 0x1c104000 0 0x1000>;
   82             interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
   83             clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>;
   84             power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
   85             iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>;
   86             mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>;
   87         };
   88     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/display/mediatek/mediatek,mdp-rdma.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/display/mediatek/mediatek,mdp-rdma.yaml