mediatek,postmask.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,postmask.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Mediatek display postmask
    8 
    9 maintainers:
   10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
   11   - Philipp Zabel <p.zabel@pengutronix.de>
   12 
   13 description: |
   14   Mediatek display postmask, namely POSTMASK, provides round corner pattern
   15   generation.
   16   POSTMASK device node must be siblings to the central MMSYS_CONFIG node.
   17   For a description of the MMSYS_CONFIG binding, see
   18   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
   19   for details.
   20 
   21 properties:
   22   compatible:
   23     oneOf:
   24       - items:
   25           - const: mediatek,mt8192-disp-postmask
   26       - items:
   27           - enum:
   28               - mediatek,mt8186-disp-postmask
   29           - const: mediatek,mt8192-disp-postmask
   30 
   31   reg:
   32     maxItems: 1
   33 
   34   interrupts:
   35     maxItems: 1
   36 
   37   power-domains:
   38     description: A phandle and PM domain specifier as defined by bindings of
   39       the power controller specified by phandle. See
   40       Documentation/devicetree/bindings/power/power-domain.yaml for details.
   41 
   42   clocks:
   43     items:
   44       - description: POSTMASK Clock
   45 
   46   mediatek,gce-client-reg:
   47     description: The register of client driver can be configured by gce with
   48       4 arguments defined in this property, such as phandle of gce, subsys id,
   49       register offset and size. Each GCE subsys id is mapping to a client
   50       defined in the header include/dt-bindings/gce/<chip>-gce.h.
   51     $ref: /schemas/types.yaml#/definitions/phandle-array
   52     maxItems: 1
   53 
   54 required:
   55   - compatible
   56   - reg
   57   - interrupts
   58   - power-domains
   59   - clocks
   60 
   61 additionalProperties: false
   62 
   63 examples:
   64   - |
   65     #include <dt-bindings/interrupt-controller/arm-gic.h>
   66     #include <dt-bindings/clock/mt8192-clk.h>
   67     #include <dt-bindings/power/mt8192-power.h>
   68     #include <dt-bindings/gce/mt8192-gce.h>
   69 
   70     soc {
   71         #address-cells = <2>;
   72         #size-cells = <2>;
   73 
   74         postmask0: postmask@1400d000 {
   75             compatible = "mediatek,mt8192-disp-postmask";
   76             reg = <0 0x1400d000 0 0x1000>;
   77             interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>;
   78             power-domains = <&scpsys MT8192_POWER_DOMAIN_DISP>;
   79             clocks = <&mmsys CLK_MM_DISP_POSTMASK0>;
   80             mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;
   81         };
   82     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/display/mediatek/mediatek,postmask.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/display/mediatek/mediatek,postmask.yaml