dsi-controller-main.yaml

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    1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Qualcomm Display DSI controller
    8 
    9 maintainers:
   10   - Krishna Manikandan <quic_mkrishn@quicinc.com>
   11 
   12 allOf:
   13   - $ref: "../dsi-controller.yaml#"
   14 
   15 properties:
   16   compatible:
   17     enum:
   18       - qcom,mdss-dsi-ctrl
   19       - qcom,dsi-ctrl-6g-qcm2290
   20 
   21   reg:
   22     maxItems: 1
   23 
   24   reg-names:
   25     const: dsi_ctrl
   26 
   27   interrupts:
   28     maxItems: 1
   29 
   30   clocks:
   31     items:
   32       - description: Display byte clock
   33       - description: Display byte interface clock
   34       - description: Display pixel clock
   35       - description: Display escape clock
   36       - description: Display AHB clock
   37       - description: Display AXI clock
   38 
   39   clock-names:
   40     items:
   41       - const: byte
   42       - const: byte_intf
   43       - const: pixel
   44       - const: core
   45       - const: iface
   46       - const: bus
   47 
   48   phys:
   49     maxItems: 1
   50 
   51   phy-names:
   52     const: dsi
   53 
   54   "#address-cells": true
   55 
   56   "#size-cells": true
   57 
   58   syscon-sfpb:
   59     description: A phandle to mmss_sfpb syscon node (only for DSIv2).
   60     $ref: "/schemas/types.yaml#/definitions/phandle"
   61 
   62   qcom,dual-dsi-mode:
   63     type: boolean
   64     description: |
   65       Indicates if the DSI controller is driving a panel which needs
   66       2 DSI links.
   67 
   68   assigned-clocks:
   69     minItems: 2
   70     maxItems: 2
   71     description: |
   72       Parents of "byte" and "pixel" for the given platform.
   73 
   74   assigned-clock-parents:
   75     minItems: 2
   76     maxItems: 2
   77     description: |
   78       The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
   79 
   80   power-domains:
   81     maxItems: 1
   82 
   83   operating-points-v2: true
   84 
   85   ports:
   86     $ref: "/schemas/graph.yaml#/properties/ports"
   87     description: |
   88       Contains DSI controller input and output ports as children, each
   89       containing one endpoint subnode.
   90 
   91     properties:
   92       port@0:
   93         $ref: "/schemas/graph.yaml#/$defs/port-base"
   94         unevaluatedProperties: false
   95         description: |
   96           Input endpoints of the controller.
   97         properties:
   98           endpoint:
   99             $ref: /schemas/media/video-interfaces.yaml#
  100             unevaluatedProperties: false
  101             properties:
  102               data-lanes:
  103                 maxItems: 4
  104                 minItems: 4
  105                 items:
  106                   enum: [ 0, 1, 2, 3 ]
  107 
  108       port@1:
  109         $ref: "/schemas/graph.yaml#/$defs/port-base"
  110         unevaluatedProperties: false
  111         description: |
  112           Output endpoints of the controller.
  113         properties:
  114           endpoint:
  115             $ref: /schemas/media/video-interfaces.yaml#
  116             unevaluatedProperties: false
  117             properties:
  118               data-lanes:
  119                 maxItems: 4
  120                 minItems: 4
  121                 items:
  122                   enum: [ 0, 1, 2, 3 ]
  123 
  124     required:
  125       - port@0
  126       - port@1
  127 
  128 required:
  129   - compatible
  130   - reg
  131   - reg-names
  132   - interrupts
  133   - clocks
  134   - clock-names
  135   - phys
  136   - phy-names
  137   - assigned-clocks
  138   - assigned-clock-parents
  139   - power-domains
  140   - operating-points-v2
  141   - ports
  142 
  143 additionalProperties: false
  144 
  145 examples:
  146   - |
  147      #include <dt-bindings/interrupt-controller/arm-gic.h>
  148      #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
  149      #include <dt-bindings/clock/qcom,gcc-sdm845.h>
  150      #include <dt-bindings/power/qcom-rpmpd.h>
  151 
  152      dsi@ae94000 {
  153            compatible = "qcom,mdss-dsi-ctrl";
  154            reg = <0x0ae94000 0x400>;
  155            reg-names = "dsi_ctrl";
  156 
  157            #address-cells = <1>;
  158            #size-cells = <0>;
  159 
  160            interrupt-parent = <&mdss>;
  161            interrupts = <4>;
  162 
  163            clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
  164                     <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
  165                     <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
  166                     <&dispcc DISP_CC_MDSS_ESC0_CLK>,
  167                     <&dispcc DISP_CC_MDSS_AHB_CLK>,
  168                     <&dispcc DISP_CC_MDSS_AXI_CLK>;
  169            clock-names = "byte",
  170                          "byte_intf",
  171                          "pixel",
  172                          "core",
  173                          "iface",
  174                          "bus";
  175 
  176            phys = <&dsi0_phy>;
  177            phy-names = "dsi";
  178 
  179            assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
  180            assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
  181 
  182            power-domains = <&rpmhpd SC7180_CX>;
  183            operating-points-v2 = <&dsi_opp_table>;
  184 
  185            ports {
  186                   #address-cells = <1>;
  187                   #size-cells = <0>;
  188 
  189                   port@0 {
  190                           reg = <0>;
  191                           dsi0_in: endpoint {
  192                                    remote-endpoint = <&dpu_intf1_out>;
  193                           };
  194                   };
  195 
  196                   port@1 {
  197                           reg = <1>;
  198                           dsi0_out: endpoint {
  199                                    remote-endpoint = <&sn65dsi86_in>;
  200                                    data-lanes = <0 1 2 3>;
  201                           };
  202                   };
  203            };
  204      };
  205 ...

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/display/msm/dsi-controller-main.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/display/msm/dsi-controller-main.yaml