The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/display/rockchip/rockchip-vop.yaml

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 # SPDX-License-Identifier: GPL-2.0
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Rockchip SoC display controller (VOP)
    8 
    9 description:
   10   VOP (Video Output Processor) is the display controller for the Rockchip
   11   series of SoCs which transfers the image data from a video memory
   12   buffer to an external LCD interface.
   13 
   14 maintainers:
   15   - Sandy Huang <hjc@rock-chips.com>
   16   - Heiko Stuebner <heiko@sntech.de>
   17 
   18 properties:
   19   compatible:
   20     enum:
   21       - rockchip,px30-vop-big
   22       - rockchip,px30-vop-lit
   23       - rockchip,rk3036-vop
   24       - rockchip,rk3066-vop
   25       - rockchip,rk3126-vop
   26       - rockchip,rk3188-vop
   27       - rockchip,rk3228-vop
   28       - rockchip,rk3288-vop
   29       - rockchip,rk3328-vop
   30       - rockchip,rk3366-vop
   31       - rockchip,rk3368-vop
   32       - rockchip,rk3399-vop-big
   33       - rockchip,rk3399-vop-lit
   34 
   35   reg:
   36     minItems: 1
   37     items:
   38       - description:
   39           Must contain one entry corresponding to the base address and length
   40           of the register space.
   41       - description:
   42           Can optionally contain a second entry corresponding to
   43           the CRTC gamma LUT address.
   44 
   45   interrupts:
   46     maxItems: 1
   47     description:
   48       The VOP interrupt is shared by several interrupt sources, such as
   49       frame start (VSYNC), line flag and other status interrupts.
   50 
   51   clocks:
   52     items:
   53       - description: Clock for ddr buffer transfer.
   54       - description: Pixel clock.
   55       - description: Clock for the ahb bus to R/W the phy regs.
   56 
   57   clock-names:
   58     items:
   59       - const: aclk_vop
   60       - const: dclk_vop
   61       - const: hclk_vop
   62 
   63   resets:
   64     maxItems: 3
   65 
   66   reset-names:
   67     items:
   68       - const: axi
   69       - const: ahb
   70       - const: dclk
   71 
   72   port:
   73     $ref: /schemas/graph.yaml#/properties/port
   74 
   75   assigned-clocks:
   76     maxItems: 2
   77 
   78   assigned-clock-rates:
   79     maxItems: 2
   80 
   81   iommus:
   82     maxItems: 1
   83 
   84   power-domains:
   85     maxItems: 1
   86 
   87 required:
   88   - compatible
   89   - reg
   90   - interrupts
   91   - clocks
   92   - clock-names
   93   - resets
   94   - reset-names
   95   - port
   96 
   97 additionalProperties: false
   98 
   99 examples:
  100   - |
  101     #include <dt-bindings/clock/rk3288-cru.h>
  102     #include <dt-bindings/interrupt-controller/arm-gic.h>
  103     #include <dt-bindings/power/rk3288-power.h>
  104     vopb: vopb@ff930000 {
  105       compatible = "rockchip,rk3288-vop";
  106       reg = <0xff930000 0x19c>,
  107             <0xff931000 0x1000>;
  108       interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
  109       clocks = <&cru ACLK_VOP0>,
  110                <&cru DCLK_VOP0>,
  111                <&cru HCLK_VOP0>;
  112       clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
  113       power-domains = <&power RK3288_PD_VIO>;
  114       resets = <&cru SRST_LCDC1_AXI>,
  115                <&cru SRST_LCDC1_AHB>,
  116                <&cru SRST_LCDC1_DCLK>;
  117       reset-names = "axi", "ahb", "dclk";
  118       iommus = <&vopb_mmu>;
  119       vopb_out: port {
  120         #address-cells = <1>;
  121         #size-cells = <0>;
  122         vopb_out_edp: endpoint@0 {
  123           reg = <0>;
  124           remote-endpoint=<&edp_in_vopb>;
  125         };
  126         vopb_out_hdmi: endpoint@1 {
  127           reg = <1>;
  128           remote-endpoint=<&hdmi_in_vopb>;
  129         };
  130       };
  131     };

Cache object: 6e557911ec75ec87775700f0ba80549e


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.