nvidia,tegra20-dsi.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: NVIDIA Tegra Display Serial Interface
    8 
    9 maintainers:
   10   - Thierry Reding <thierry.reding@gmail.com>
   11   - Jon Hunter <jonathanh@nvidia.com>
   12 
   13 properties:
   14   compatible:
   15     oneOf:
   16       - enum:
   17           - nvidia,tegra20-dsi
   18           - nvidia,tegra30-dsi
   19           - nvidia,tegra114-dsi
   20           - nvidia,tegra124-dsi
   21           - nvidia,tegra210-dsi
   22           - nvidia,tegra186-dsi
   23 
   24       - items:
   25           - const: nvidia,tegra132-dsi
   26           - const: nvidia,tegra124-dsi
   27 
   28   reg:
   29     maxItems: 1
   30 
   31   interrupts:
   32     maxItems: 1
   33 
   34   clocks:
   35     minItems: 2
   36     maxItems: 3
   37 
   38   clock-names:
   39     minItems: 2
   40     maxItems: 3
   41 
   42   resets:
   43     items:
   44       - description: module reset
   45 
   46   reset-names:
   47     items:
   48       - const: dsi
   49 
   50   operating-points-v2:
   51     $ref: "/schemas/types.yaml#/definitions/phandle"
   52 
   53   power-domains:
   54     maxItems: 1
   55 
   56   avdd-dsi-csi-supply:
   57     description: phandle of a supply that powers the DSI controller
   58 
   59   nvidia,mipi-calibrate:
   60     description: Should contain a phandle and a specifier specifying
   61       which pads are used by this DSI output and need to be
   62       calibrated. See nvidia,tegra114-mipi.yaml for details.
   63     $ref: "/schemas/types.yaml#/definitions/phandle-array"
   64 
   65   nvidia,ddc-i2c-bus:
   66     description: phandle of an I2C controller used for DDC EDID
   67       probing
   68     $ref: "/schemas/types.yaml#/definitions/phandle"
   69 
   70   nvidia,hpd-gpio:
   71     description: specifies a GPIO used for hotplug detection
   72     maxItems: 1
   73 
   74   nvidia,edid:
   75     description: supplies a binary EDID blob
   76     $ref: "/schemas/types.yaml#/definitions/uint8-array"
   77 
   78   nvidia,panel:
   79     description: phandle of a display panel
   80     $ref: "/schemas/types.yaml#/definitions/phandle"
   81 
   82   nvidia,ganged-mode:
   83     description: contains a phandle to a second DSI controller to
   84       gang up with in order to support up to 8 data lanes
   85     $ref: "/schemas/types.yaml#/definitions/phandle"
   86 
   87 allOf:
   88   - $ref: "../dsi-controller.yaml#"
   89   - if:
   90       properties:
   91         compatible:
   92           contains:
   93             enum:
   94               - nvidia,tegra20-dsi
   95               - nvidia,tegra30-dsi
   96     then:
   97       properties:
   98         clocks:
   99           items:
  100             - description: DSI module clock
  101             - description: input for the pixel clock
  102 
  103         clock-names:
  104           items:
  105             - const: dsi
  106             - const: parent
  107     else:
  108       properties:
  109         clocks:
  110           items:
  111             - description: DSI module clock
  112             - description: low-power module clock
  113             - description: input for the pixel clock
  114 
  115         clock-names:
  116           items:
  117             - const: dsi
  118             - const: lp
  119             - const: parent
  120 
  121   - if:
  122       properties:
  123         compatible:
  124           contains:
  125             const: nvidia,tegra186-dsi
  126     then:
  127       required:
  128         - interrupts
  129 
  130 unevaluatedProperties: false
  131 
  132 required:
  133   - compatible
  134   - reg
  135   - clocks
  136   - clock-names
  137   - resets
  138   - reset-names
  139 
  140 examples:
  141   - |
  142     #include <dt-bindings/clock/tegra186-clock.h>
  143     #include <dt-bindings/interrupt-controller/arm-gic.h>
  144     #include <dt-bindings/power/tegra186-powergate.h>
  145     #include <dt-bindings/reset/tegra186-reset.h>
  146 
  147     dsi@15300000 {
  148         compatible = "nvidia,tegra186-dsi";
  149         reg = <0x15300000 0x10000>;
  150         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
  151         clocks = <&bpmp TEGRA186_CLK_DSI>,
  152                  <&bpmp TEGRA186_CLK_DSIA_LP>,
  153                  <&bpmp TEGRA186_CLK_PLLD>;
  154         clock-names = "dsi", "lp", "parent";
  155         resets = <&bpmp TEGRA186_RESET_DSI>;
  156         reset-names = "dsi";
  157 
  158         power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
  159     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/display/tegra/nvidia,tegra20-dsi.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/display/tegra/nvidia,tegra20-dsi.yaml