The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/display/tegra/nvidia,tegra20-isp.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-isp.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: NVIDIA Tegra ISP processor
    8 
    9 maintainers:
   10   - Thierry Reding <thierry.reding@gmail.com>
   11   - Jon Hunter <jonathanh@nvidia.com>
   12 
   13 properties:
   14   compatible:
   15     enum:
   16       - nvidia,tegra20-isp
   17       - nvidia,tegra30-isp
   18       - nvidia,tegra210-isp
   19 
   20   reg:
   21     maxItems: 1
   22 
   23   interrupts:
   24     maxItems: 1
   25 
   26   clocks:
   27     items:
   28       - description: module clock
   29 
   30   resets:
   31     items:
   32       - description: module reset
   33 
   34   reset-names:
   35     items:
   36       - const: isp
   37 
   38   iommus:
   39     maxItems: 1
   40 
   41   interconnects:
   42     items:
   43       - description: memory write client
   44 
   45   interconnect-names:
   46     items:
   47       - const: dma-mem # write
   48 
   49   power-domains:
   50     items:
   51       - description: phandle to the VENC or core power domain
   52 
   53 additionalProperties: false
   54 
   55 examples:
   56   - |
   57     #include <dt-bindings/clock/tegra20-car.h>
   58     #include <dt-bindings/interrupt-controller/arm-gic.h>
   59 
   60     isp@54100000 {
   61         compatible = "nvidia,tegra20-isp";
   62         reg = <0x54100000 0x00040000>;
   63         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
   64         clocks = <&tegra_car TEGRA20_CLK_ISP>;
   65         resets = <&tegra_car 23>;
   66         reset-names = "isp";
   67     };

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