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     1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-tvo.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: NVIDIA Tegra TV Encoder Output
    8 
    9 maintainers:
   10   - Thierry Reding <thierry.reding@gmail.com>
   11   - Jon Hunter <jonathanh@nvidia.com>
   12 
   13 properties:
   14   $nodename:
   15     pattern: "^tvo@[0-9a-f]+$"
   16 
   17   compatible:
   18     enum:
   19       - nvidia,tegra20-tvo
   20       - nvidia,tegra30-tvo
   21       - nvidia,tegra114-tvo
   22 
   23   reg:
   24     maxItems: 1
   25 
   26   interrupts:
   27     maxItems: 1
   28 
   29   clocks:
   30     items:
   31       - description: module clock
   32 
   33   operating-points-v2:
   34     $ref: "/schemas/types.yaml#/definitions/phandle"
   35 
   36   power-domains:
   37     items:
   38       - description: phandle to the core power domain
   39 
   40 additionalProperties: false
   41 
   42 required:
   43   - compatible
   44   - reg
   45   - interrupts
   46   - clocks
   47 
   48 examples:
   49   - |
   50     #include <dt-bindings/clock/tegra20-car.h>
   51     #include <dt-bindings/interrupt-controller/arm-gic.h>
   52 
   53     tvo@542c0000 {
   54         compatible = "nvidia,tegra20-tvo";
   55         reg = <0x542c0000 0x00040000>;
   56         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
   57         clocks = <&tegra_car TEGRA20_CLK_TVO>;
   58     };
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