The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/dma/img-mdc-dma.txt

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    1 * IMG Multi-threaded DMA Controller (MDC)
    2 
    3 Required properties:
    4 - compatible: Must be "img,pistachio-mdc-dma".
    5 - reg: Must contain the base address and length of the MDC registers.
    6 - interrupts: Must contain all the per-channel DMA interrupts.
    7 - clocks: Must contain an entry for each entry in clock-names.
    8   See ../clock/clock-bindings.txt for details.
    9 - clock-names: Must include the following entries:
   10   - sys: MDC system interface clock.
   11 - img,cr-periph: Must contain a phandle to the peripheral control syscon
   12   node which contains the DMA request to channel mapping registers.
   13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier.
   14   The maximum burst size is this value multiplied by the hardware-reported bus
   15   width.
   16 - #dma-cells: Must be 3:
   17   - The first cell is the peripheral's DMA request line.
   18   - The second cell is a bitmap specifying to which channels the DMA request
   19     line may be mapped (i.e. bit N set indicates channel N is usable).
   20   - The third cell is the thread ID to be used by the channel.
   21 
   22 Optional properties:
   23 - dma-channels: Number of supported DMA channels, up to 32.  If not specified
   24   the number reported by the hardware is used.
   25 
   26 Example:
   27 
   28 mdc: dma-controller@18143000 {
   29         compatible = "img,pistachio-mdc-dma";
   30         reg = <0x18143000 0x1000>;
   31         interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>,
   32                      <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>,
   33                      <GIC_SHARED 29 IRQ_TYPE_LEVEL_HIGH>,
   34                      <GIC_SHARED 30 IRQ_TYPE_LEVEL_HIGH>,
   35                      <GIC_SHARED 31 IRQ_TYPE_LEVEL_HIGH>,
   36                      <GIC_SHARED 32 IRQ_TYPE_LEVEL_HIGH>,
   37                      <GIC_SHARED 33 IRQ_TYPE_LEVEL_HIGH>,
   38                      <GIC_SHARED 34 IRQ_TYPE_LEVEL_HIGH>,
   39                      <GIC_SHARED 35 IRQ_TYPE_LEVEL_HIGH>,
   40                      <GIC_SHARED 36 IRQ_TYPE_LEVEL_HIGH>,
   41                      <GIC_SHARED 37 IRQ_TYPE_LEVEL_HIGH>,
   42                      <GIC_SHARED 38 IRQ_TYPE_LEVEL_HIGH>;
   43         clocks = <&system_clk>;
   44         clock-names = "sys";
   45 
   46         img,max-burst-multiplier = <16>;
   47         img,cr-periph = <&cr_periph>;
   48 
   49         #dma-cells = <3>;
   50 };
   51 
   52 spi@18100f00 {
   53         ...
   54         dmas = <&mdc 9 0xffffffff 0>, <&mdc 10 0xffffffff 0>;
   55         dma-names = "tx", "rx";
   56         ...
   57 };

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