ingenic,dma.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Ingenic SoCs DMA Controller DT bindings
    8 
    9 maintainers:
   10   - Paul Cercueil <paul@crapouillou.net>
   11 
   12 allOf:
   13   - $ref: "dma-controller.yaml#"
   14 
   15 properties:
   16   compatible:
   17     oneOf:
   18       - enum:
   19           - ingenic,jz4740-dma
   20           - ingenic,jz4725b-dma
   21           - ingenic,jz4760-dma
   22           - ingenic,jz4760-bdma
   23           - ingenic,jz4760-mdma
   24           - ingenic,jz4760b-dma
   25           - ingenic,jz4760b-bdma
   26           - ingenic,jz4760b-mdma
   27           - ingenic,jz4770-dma
   28           - ingenic,jz4780-dma
   29           - ingenic,x1000-dma
   30           - ingenic,x1830-dma
   31       - items:
   32           - const: ingenic,jz4770-bdma
   33           - const: ingenic,jz4760b-bdma
   34 
   35   reg:
   36     items:
   37       - description: Channel-specific registers
   38       - description: System control registers
   39 
   40   interrupts:
   41     maxItems: 1
   42 
   43   clocks:
   44     maxItems: 1
   45 
   46   "#dma-cells":
   47     enum: [2, 3]
   48     description: >
   49       DMA clients must use the format described in dma.txt, giving a phandle
   50       to the DMA controller plus the following integer cells:
   51 
   52       - Request type: The DMA request type specifies the device endpoint that
   53         will be the source or destination of the DMA transfer.
   54         If "#dma-cells" is 2, the request type is a single cell, and the
   55         direction will be unidirectional (either RX or TX but not both).
   56         If "#dma-cells" is 3, the request type has two cells; the first
   57         one corresponds to the host to device direction (TX), the second one
   58         corresponds to the device to host direction (RX). The DMA channel is
   59         then bidirectional.
   60 
   61       - Channel: If set to 0xffffffff, any available channel will be allocated
   62         for the client. Otherwise, the exact channel specified will be used.
   63         The channel should be reserved on the DMA controller using the
   64         ingenic,reserved-channels property.
   65 
   66   ingenic,reserved-channels:
   67     $ref: /schemas/types.yaml#/definitions/uint32
   68     description: >
   69       Bitmask of channels to reserve for devices that need a specific
   70       channel. These channels will only be assigned when explicitely
   71       requested by a client. The primary use for this is channels 0 and
   72       1, which can be configured to have special behaviour for NAND/BCH
   73       when using programmable firmware.
   74 
   75 required:
   76   - compatible
   77   - reg
   78   - interrupts
   79   - clocks
   80 
   81 unevaluatedProperties: false
   82 
   83 examples:
   84   - |
   85     #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
   86     dma: dma-controller@13420000 {
   87       compatible = "ingenic,jz4780-dma";
   88       reg = <0x13420000 0x400>, <0x13421000 0x40>;
   89 
   90       interrupt-parent = <&intc>;
   91       interrupts = <10>;
   92 
   93       clocks = <&cgu JZ4780_CLK_PDMA>;
   94 
   95       #dma-cells = <2>;
   96 
   97       ingenic,reserved-channels = <0x3>;
   98     };

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