The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/dma/mediatek,uart-dma.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/dma/mediatek,uart-dma.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: MediaTek UART APDMA controller
    8 
    9 maintainers:
   10   - Long Cheng <long.cheng@mediatek.com>
   11 
   12 description: |
   13   The MediaTek UART APDMA controller provides DMA capabilities
   14   for the UART peripheral bus.
   15 
   16 allOf:
   17   - $ref: "dma-controller.yaml#"
   18 
   19 properties:
   20   compatible:
   21     oneOf:
   22       - items:
   23           - enum:
   24               - mediatek,mt2712-uart-dma
   25               - mediatek,mt8365-uart-dma
   26               - mediatek,mt8516-uart-dma
   27           - const: mediatek,mt6577-uart-dma
   28       - enum:
   29           - mediatek,mt6577-uart-dma
   30 
   31   reg:
   32     minItems: 1
   33     maxItems: 16
   34 
   35   interrupts:
   36     description: |
   37       TX, RX interrupt lines for each UART APDMA channel
   38     minItems: 1
   39     maxItems: 16
   40 
   41   clocks:
   42     description: Must contain one entry for the APDMA main clock
   43     maxItems: 1
   44 
   45   clock-names:
   46     const: apdma
   47 
   48   "#dma-cells":
   49     const: 1
   50     description: |
   51       The first cell specifies the UART APDMA channel number
   52 
   53   dma-requests:
   54     description: |
   55       Number of virtual channels of the UART APDMA controller
   56     maximum: 16
   57 
   58   mediatek,dma-33bits:
   59     type: boolean
   60     description: Enable 33-bits UART APDMA support
   61 
   62 required:
   63   - compatible
   64   - reg
   65   - interrupts
   66 
   67 additionalProperties: false
   68 
   69 if:
   70   not:
   71     required:
   72       - dma-requests
   73 then:
   74   properties:
   75     interrupts:
   76       maxItems: 8
   77     reg:
   78       maxItems: 8
   79 
   80 examples:
   81   - |
   82     #include <dt-bindings/interrupt-controller/arm-gic.h>
   83     #include <dt-bindings/clock/mt2712-clk.h>
   84     soc {
   85         #address-cells = <2>;
   86         #size-cells = <2>;
   87 
   88         apdma: dma-controller@11000400 {
   89             compatible = "mediatek,mt2712-uart-dma",
   90                          "mediatek,mt6577-uart-dma";
   91             reg = <0 0x11000400 0 0x80>,
   92                   <0 0x11000480 0 0x80>,
   93                   <0 0x11000500 0 0x80>,
   94                   <0 0x11000580 0 0x80>,
   95                   <0 0x11000600 0 0x80>,
   96                   <0 0x11000680 0 0x80>,
   97                   <0 0x11000700 0 0x80>,
   98                   <0 0x11000780 0 0x80>,
   99                   <0 0x11000800 0 0x80>,
  100                   <0 0x11000880 0 0x80>,
  101                   <0 0x11000900 0 0x80>,
  102                   <0 0x11000980 0 0x80>;
  103             interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>,
  104                          <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
  105                          <GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>,
  106                          <GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>,
  107                          <GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>,
  108                          <GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>,
  109                          <GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>,
  110                          <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>,
  111                          <GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>,
  112                          <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>,
  113                          <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>,
  114                          <GIC_SPI 114 IRQ_TYPE_LEVEL_LOW>;
  115             dma-requests = <12>;
  116             clocks = <&pericfg CLK_PERI_AP_DMA>;
  117             clock-names = "apdma";
  118             mediatek,dma-33bits;
  119             #dma-cells = <1>;
  120         };
  121     };
  122 
  123 ...

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