nvidia,tegra186-gpc-dma.yaml

Version: - FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10

    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: NVIDIA Tegra GPC DMA Controller Device Tree Bindings
    8 
    9 description: |
   10   The Tegra General Purpose Central (GPC) DMA controller is used for faster
   11   data transfers between memory to memory, memory to device and device to
   12   memory.
   13 
   14 maintainers:
   15   - Jon Hunter <jonathanh@nvidia.com>
   16   - Rajesh Gumasta <rgumasta@nvidia.com>
   17 
   18 allOf:
   19   - $ref: "dma-controller.yaml#"
   20 
   21 properties:
   22   compatible:
   23     oneOf:
   24       - const: nvidia,tegra186-gpcdma
   25       - items:
   26           - enum:
   27               - nvidia,tegra234-gpcdma
   28               - nvidia,tegra194-gpcdma
   29           - const: nvidia,tegra186-gpcdma
   30 
   31   "#dma-cells":
   32     const: 1
   33 
   34   reg:
   35     maxItems: 1
   36 
   37   interrupts:
   38     description:
   39       Should contain all of the per-channel DMA interrupts in
   40       ascending order with respect to the DMA channel index.
   41     minItems: 1
   42     maxItems: 31
   43 
   44   resets:
   45     maxItems: 1
   46 
   47   reset-names:
   48     const: gpcdma
   49 
   50   iommus:
   51     maxItems: 1
   52 
   53   dma-coherent: true
   54 
   55 required:
   56   - compatible
   57   - reg
   58   - interrupts
   59   - resets
   60   - reset-names
   61   - "#dma-cells"
   62   - iommus
   63 
   64 additionalProperties: false
   65 
   66 examples:
   67   - |
   68     #include <dt-bindings/interrupt-controller/arm-gic.h>
   69     #include <dt-bindings/memory/tegra186-mc.h>
   70     #include <dt-bindings/reset/tegra186-reset.h>
   71 
   72     dma-controller@2600000 {
   73         compatible = "nvidia,tegra186-gpcdma";
   74         reg = <0x2600000 0x210000>;
   75         resets = <&bpmp TEGRA186_RESET_GPCDMA>;
   76         reset-names = "gpcdma";
   77         interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
   78                      <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
   79                      <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
   80                      <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
   81                      <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
   82                      <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
   83                      <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
   84                      <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
   85                      <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
   86                      <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
   87                      <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
   88                      <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
   89                      <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
   90                      <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
   91                      <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
   92                      <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
   93                      <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
   94                      <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
   95                      <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
   96                      <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
   97                      <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
   98                      <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
   99                      <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
  100                      <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
  101                      <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
  102                      <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
  103                      <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
  104                      <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
  105                      <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
  106                      <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
  107                      <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
  108         #dma-cells = <1>;
  109         iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
  110         dma-coherent;
  111     };
  112 ...

Cache object: d3f26aa1e8aa65c8a78e846beab54f4c

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.

FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/dma/nvidia,tegra186-gpc-dma.yaml

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/dma/nvidia,tegra186-gpc-dma.yaml