nvidia,tegra210-adma.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/dma/nvidia,tegra210-adma.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: NVIDIA Tegra Audio DMA (ADMA) controller
    8 
    9 description: |
   10   The Tegra Audio DMA controller is used for transferring data
   11   between system memory and the Audio Processing Engine (APE).
   12 
   13 maintainers:
   14   - Jon Hunter <jonathanh@nvidia.com>
   15 
   16 allOf:
   17   - $ref: "dma-controller.yaml#"
   18 
   19 properties:
   20   compatible:
   21     oneOf:
   22       - enum:
   23           - nvidia,tegra210-adma
   24           - nvidia,tegra186-adma
   25       - items:
   26           - enum:
   27               - nvidia,tegra234-adma
   28               - nvidia,tegra194-adma
   29           - const: nvidia,tegra186-adma
   30 
   31   reg:
   32     maxItems: 1
   33 
   34   interrupts:
   35     description: |
   36       Should contain all of the per-channel DMA interrupts in
   37       ascending order with respect to the DMA channel index.
   38     minItems: 1
   39     maxItems: 32
   40 
   41   clocks:
   42     description: Must contain one entry for the ADMA module clock
   43     maxItems: 1
   44 
   45   clock-names:
   46     const: d_audio
   47 
   48   "#dma-cells":
   49     description: |
   50       The first cell denotes the receive/transmit request number and
   51       should be between 1 and the maximum number of requests supported.
   52       This value corresponds to the RX/TX_REQUEST_SELECT fields in the
   53       ADMA_CHn_CTRL register.
   54     const: 1
   55 
   56 required:
   57   - compatible
   58   - reg
   59   - interrupts
   60   - clocks
   61   - clock-names
   62 
   63 additionalProperties: false
   64 
   65 examples:
   66   - |
   67     #include <dt-bindings/interrupt-controller/arm-gic.h>
   68     #include<dt-bindings/clock/tegra210-car.h>
   69 
   70     dma-controller@702e2000 {
   71         compatible = "nvidia,tegra210-adma";
   72         reg = <0x702e2000 0x2000>;
   73         interrupt-parent = <&tegra_agic>;
   74         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
   75                      <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
   76                      <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
   77                      <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
   78                      <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
   79                      <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
   80                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
   81                      <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
   82                      <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
   83                      <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
   84                      <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
   85                      <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
   86                      <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
   87                      <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
   88                      <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
   89                      <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
   90                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
   91                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
   92                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
   93                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
   94                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
   95                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
   96         clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
   97         clock-names = "d_audio";
   98         #dma-cells = <1>;
   99     };
  100 
  101 ...

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sys/contrib/device-tree/Bindings/dma/nvidia,tegra210-adma.yaml