qcom,gpi.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Qualcomm Technologies Inc GPI DMA controller
    8 
    9 maintainers:
   10   - Vinod Koul <vkoul@kernel.org>
   11 
   12 description: |
   13   QCOM GPI DMA controller provides DMA capabilities for
   14   peripheral buses such as I2C, UART, and SPI.
   15 
   16 allOf:
   17   - $ref: "dma-controller.yaml#"
   18 
   19 properties:
   20   compatible:
   21     enum:
   22       - qcom,sc7280-gpi-dma
   23       - qcom,sdm845-gpi-dma
   24       - qcom,sm8150-gpi-dma
   25       - qcom,sm8250-gpi-dma
   26       - qcom,sm8350-gpi-dma
   27       - qcom,sm8450-gpi-dma
   28 
   29   reg:
   30     maxItems: 1
   31 
   32   interrupts:
   33     description:
   34       Interrupt lines for each GPI instance
   35     minItems: 1
   36     maxItems: 13
   37 
   38   "#dma-cells":
   39     const: 3
   40     description: >
   41       DMA clients must use the format described in dma.txt, giving a phandle
   42       to the DMA controller plus the following 3 integer cells:
   43       - channel: if set to 0xffffffff, any available channel will be allocated
   44         for the client. Otherwise, the exact channel specified will be used.
   45       - seid: serial id of the client as defined in the SoC documentation.
   46       - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
   47 
   48   iommus:
   49     maxItems: 1
   50 
   51   dma-channels:
   52     maximum: 31
   53 
   54   dma-channel-mask:
   55     maxItems: 1
   56 
   57 required:
   58   - compatible
   59   - reg
   60   - interrupts
   61   - "#dma-cells"
   62   - iommus
   63   - dma-channels
   64   - dma-channel-mask
   65 
   66 additionalProperties: false
   67 
   68 examples:
   69   - |
   70     #include <dt-bindings/interrupt-controller/arm-gic.h>
   71     #include <dt-bindings/dma/qcom-gpi.h>
   72     gpi_dma0: dma-controller@800000 {
   73         compatible = "qcom,sdm845-gpi-dma";
   74         #dma-cells = <3>;
   75         reg = <0x00800000 0x60000>;
   76         iommus = <&apps_smmu 0x0016 0x0>;
   77         dma-channels = <13>;
   78         dma-channel-mask = <0xfa>;
   79         interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
   80                      <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
   81                      <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
   82                      <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
   83                      <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
   84                      <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
   85                      <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
   86                      <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
   87                      <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
   88                      <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
   89                      <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
   90                      <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
   91                      <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
   92     };
   93 
   94 ...

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