The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/gpio/gpio-eic-sprd.txt

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    1 Spreadtrum EIC controller bindings
    2 
    3 The EIC is the abbreviation of external interrupt controller, which can
    4 be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
    5 one is in digital chip, and another one is in PMIC. The digital chip EIC
    6 controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and
    7 EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
    8 module.
    9 
   10 The EIC-debounce sub-module provides up to 8 source input signal
   11 connections. A debounce mechanism is used to capture the input signals'
   12 stable status (millisecond resolution) and a single-trigger mechanism
   13 is introduced into this sub-module to enhance the input event detection
   14 reliability. In addition, this sub-module's clock can be shut off
   15 automatically to reduce power dissipation. Moreover the debounce range
   16 is from 1ms to 4s with a step size of 1ms. The input signal will be
   17 ignored if it is asserted for less than 1 ms.
   18 
   19 The EIC-latch sub-module is used to latch some special power down signals
   20 and generate interrupts, since the EIC-latch does not depend on the APB
   21 clock to capture signals.
   22 
   23 The EIC-async sub-module uses a 32kHz clock to capture the short signals
   24 (microsecond resolution) to generate interrupts by level or edge trigger.
   25 
   26 The EIC-sync is similar with GPIO's input function, which is a synchronized
   27 signal input register. It can generate interrupts by level or edge trigger
   28 when detecting input signals.
   29 
   30 Required properties:
   31 - compatible: Should be one of the following:
   32   "sprd,sc9860-eic-debounce",
   33   "sprd,sc9860-eic-latch",
   34   "sprd,sc9860-eic-async",
   35   "sprd,sc9860-eic-sync",
   36   "sprd,sc2731-eic".
   37 - reg: Define the base and range of the I/O address space containing
   38   the GPIO controller registers.
   39 - gpio-controller: Marks the device node as a GPIO controller.
   40 - #gpio-cells: Should be <2>. The first cell is the gpio number and
   41   the second cell is used to specify optional parameters.
   42 - interrupt-controller: Marks the device node as an interrupt controller.
   43 - #interrupt-cells: Should be <2>. Specifies the number of cells needed
   44   to encode interrupt source.
   45 - interrupts: Should be the port interrupt shared by all the gpios.
   46 
   47 Example:
   48         eic_debounce: gpio@40210000 {
   49                 compatible = "sprd,sc9860-eic-debounce";
   50                 reg = <0 0x40210000 0 0x80>;
   51                 gpio-controller;
   52                 #gpio-cells = <2>;
   53                 interrupt-controller;
   54                 #interrupt-cells = <2>;
   55                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
   56         };
   57 
   58         eic_latch: gpio@40210080 {
   59                 compatible = "sprd,sc9860-eic-latch";
   60                 reg = <0 0x40210080 0 0x20>;
   61                 gpio-controller;
   62                 #gpio-cells = <2>;
   63                 interrupt-controller;
   64                 #interrupt-cells = <2>;
   65                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
   66         };
   67 
   68         eic_async: gpio@402100a0 {
   69                 compatible = "sprd,sc9860-eic-async";
   70                 reg = <0 0x402100a0 0 0x20>;
   71                 gpio-controller;
   72                 #gpio-cells = <2>;
   73                 interrupt-controller;
   74                 #interrupt-cells = <2>;
   75                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
   76         };
   77 
   78         eic_sync: gpio@402100c0 {
   79                 compatible = "sprd,sc9860-eic-sync";
   80                 reg = <0 0x402100c0 0 0x20>;
   81                 gpio-controller;
   82                 #gpio-cells = <2>;
   83                 interrupt-controller;
   84                 #interrupt-cells = <2>;
   85                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
   86         };
   87 
   88         pmic_eic: gpio@300 {
   89                 compatible = "sprd,sc2731-eic";
   90                 reg = <0x300>;
   91                 interrupt-parent = <&sc2731_pmic>;
   92                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
   93                 gpio-controller;
   94                 #gpio-cells = <2>;
   95                 interrupt-controller;
   96                 #interrupt-cells = <2>;
   97         };

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