The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/gpio/mediatek,mt7621-gpio.txt

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    1 Mediatek MT7621 SoC GPIO controller bindings
    2 
    3 The IP core used inside these SoCs has 3 banks of 32 GPIOs each.
    4 The registers of all the banks are interwoven inside one single IO range.
    5 We load one GPIO controller instance per bank. Also the GPIO controller can receive
    6 interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU
    7 using GIC INT12.
    8 
    9 Required properties for the top level node:
   10 - #gpio-cells : Should be two. The first cell is the GPIO pin number and the
   11    second cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>.
   12    Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
   13 - #interrupt-cells : Specifies the number of cells needed to encode an
   14    interrupt. Should be 2. The first cell defines the interrupt number,
   15    the second encodes the trigger flags encoded as described in
   16    Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
   17 - compatible:
   18   - "mediatek,mt7621-gpio" for Mediatek controllers
   19 - reg : Physical base address and length of the controller's registers
   20 - interrupt-parent : phandle of the parent interrupt controller.
   21 - interrupts : Interrupt specifier for the controllers interrupt.
   22 - interrupt-controller : Mark the device node as an interrupt controller.
   23 - gpio-controller : Marks the device node as a GPIO controller.
   24 
   25 Example:
   26         gpio@600 {
   27                 #gpio-cells = <2>;
   28                 #interrupt-cells = <2>;
   29                 compatible = "mediatek,mt7621-gpio";
   30                 gpio-controller;
   31                 interrupt-controller;
   32                 reg = <0x600 0x100>;
   33                 interrupt-parent = <&gic>;
   34                 interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;
   35         };

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