1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: MediaTek I2C controller
8
9 description:
10 This driver interfaces with the native I2C controller present in
11 various MediaTek SoCs.
12
13 allOf:
14 - $ref: /schemas/i2c/i2c-controller.yaml#
15
16 maintainers:
17 - Qii Wang <qii.wang@mediatek.com>
18
19 properties:
20 compatible:
21 oneOf:
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
24 - const: mediatek,mt6589-i2c
25 - const: mediatek,mt7622-i2c
26 - const: mediatek,mt8168-i2c
27 - const: mediatek,mt8173-i2c
28 - const: mediatek,mt8183-i2c
29 - const: mediatek,mt8186-i2c
30 - const: mediatek,mt8188-i2c
31 - const: mediatek,mt8192-i2c
32 - items:
33 - enum:
34 - mediatek,mt7629-i2c
35 - mediatek,mt8516-i2c
36 - const: mediatek,mt2712-i2c
37 - items:
38 - enum:
39 - mediatek,mt2701-i2c
40 - mediatek,mt6797-i2c
41 - mediatek,mt7623-i2c
42 - const: mediatek,mt6577-i2c
43 - items:
44 - enum:
45 - mediatek,mt8195-i2c
46 - const: mediatek,mt8192-i2c
47
48 reg:
49 items:
50 - description: Physical base address
51 - description: DMA base address
52
53 interrupts:
54 maxItems: 1
55
56 clocks:
57 minItems: 2
58 items:
59 - description: Main clock for I2C bus
60 - description: Clock for I2C via DMA
61 - description: Bus arbitrator clock
62 - description: Clock for I2C from PMIC
63
64 clock-names:
65 minItems: 2
66 items:
67 - const: main
68 - const: dma
69 - const: arb
70 - const: pmic
71
72 clock-div:
73 $ref: /schemas/types.yaml#/definitions/uint32
74 description: Frequency divider of clock source in I2C module
75
76 clock-frequency:
77 default: 100000
78 description:
79 SCL frequency to use (in Hz). If omitted, 100kHz is used.
80
81 mediatek,have-pmic:
82 description: Platform controls I2C from PMIC side
83 type: boolean
84
85 mediatek,use-push-pull:
86 description: Use push-pull mode I/O config
87 type: boolean
88
89 vbus-supply:
90 description: Phandle to the regulator providing power to SCL/SDA
91
92 required:
93 - compatible
94 - reg
95 - clocks
96 - clock-names
97 - clock-div
98 - interrupts
99
100 unevaluatedProperties: false
101
102 examples:
103 - |
104 #include <dt-bindings/interrupt-controller/arm-gic.h>
105 #include <dt-bindings/interrupt-controller/irq.h>
106
107 i2c0: i2c@1100d000 {
108 compatible = "mediatek,mt6577-i2c";
109 reg = <0x1100d000 0x70>, <0x11000300 0x80>;
110 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
111 clocks = <&i2c0_ck>, <&ap_dma_ck>;
112 clock-names = "main", "dma";
113 clock-div = <16>;
114 clock-frequency = <400000>;
115 mediatek,have-pmic;
116
117 #address-cells = <1>;
118 #size-cells = <0>;
119 };
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