i2c-qcom-cci.txt

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    1 Qualcomm Camera Control Interface (CCI) I2C controller
    2 
    3 PROPERTIES:
    4 
    5 - compatible:
    6         Usage: required
    7         Value type: <string>
    8         Definition: must be one of:
    9                 "qcom,msm8916-cci"
   10                 "qcom,msm8996-cci"
   11                 "qcom,sdm845-cci"
   12                 "qcom,sm8250-cci"
   13                 "qcom,sm8450-cci"
   14 
   15 - reg
   16         Usage: required
   17         Value type: <prop-encoded-array>
   18         Definition: base address CCI I2C controller and length of memory
   19                     mapped region.
   20 
   21 - interrupts:
   22         Usage: required
   23         Value type: <prop-encoded-array>
   24         Definition: specifies the CCI I2C interrupt. The format of the
   25                     specifier is defined by the binding document describing
   26                     the node's interrupt parent.
   27 
   28 - clocks:
   29         Usage: required
   30         Value type: <prop-encoded-array>
   31         Definition: a list of phandle, should contain an entry for each
   32                     entries in clock-names.
   33 
   34 - clock-names
   35         Usage: required
   36         Value type: <string>
   37         Definition: a list of clock names, must include "cci" clock.
   38 
   39 - power-domains
   40         Usage: required for "qcom,msm8996-cci"
   41         Value type: <prop-encoded-array>
   42         Definition:
   43 
   44 SUBNODES:
   45 
   46 The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996,
   47 sdm845, sm8250 and sm8450), described as subdevices named "i2c-bus@0" and
   48 "i2c-bus@1".
   49 
   50 PROPERTIES:
   51 
   52 - reg:
   53         Usage: required
   54         Value type: <u32>
   55         Definition: Index of the CCI bus/master
   56 
   57 - clock-frequency:
   58         Usage: optional
   59         Value type: <u32>
   60         Definition: Desired I2C bus clock frequency in Hz, defaults to 100
   61                     kHz if omitted.
   62 
   63 Example:
   64 
   65         cci@a0c000 {
   66                 compatible = "qcom,msm8996-cci";
   67                 #address-cells = <1>;
   68                 #size-cells = <0>;
   69                 reg = <0xa0c000 0x1000>;
   70                 interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
   71                 clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>,
   72                          <&mmcc CAMSS_TOP_AHB_CLK>,
   73                          <&mmcc CAMSS_CCI_AHB_CLK>,
   74                          <&mmcc CAMSS_CCI_CLK>,
   75                          <&mmcc CAMSS_AHB_CLK>;
   76                 clock-names = "mmss_mmagic_ahb",
   77                               "camss_top_ahb",
   78                               "cci_ahb",
   79                               "cci",
   80                               "camss_ahb";
   81 
   82                 i2c-bus@0 {
   83                         reg = <0>;
   84                         clock-frequency = <400000>;
   85                         #address-cells = <1>;
   86                         #size-cells = <0>;
   87                 };
   88 
   89                 i2c-bus@1 {
   90                         reg = <1>;
   91                         clock-frequency = <400000>;
   92                         #address-cells = <1>;
   93                         #size-cells = <0>;
   94                 };
   95         };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/i2c/i2c-qcom-cci.txt

FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/i2c/i2c-qcom-cci.txt