1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/i2c/mellanox,i2c-mlxbf.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Mellanox I2C SMBus on BlueField SoCs
8
9 maintainers:
10 - Khalil Blaiech <kblaiech@nvidia.com>
11
12 allOf:
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14
15 properties:
16 compatible:
17 enum:
18 - mellanox,i2c-mlxbf1
19 - mellanox,i2c-mlxbf2
20
21 reg:
22 minItems: 3
23 items:
24 - description: Smbus block registers
25 - description: Cause master registers
26 - description: Cause slave registers
27 - description: Cause coalesce registers
28
29 interrupts:
30 maxItems: 1
31
32 clock-frequency:
33 enum: [ 100000, 400000, 1000000 ]
34 description:
35 bus frequency used to configure timing registers;
36 The frequency is expressed in Hz. Default is 100000.
37
38 required:
39 - compatible
40 - reg
41 - interrupts
42
43 unevaluatedProperties: false
44
45 if:
46 properties:
47 compatible:
48 contains:
49 enum:
50 - mellanox,i2c-mlxbf1
51
52 then:
53 properties:
54 reg:
55 maxItems: 3
56
57 examples:
58 - |
59 i2c@2804000 {
60 compatible = "mellanox,i2c-mlxbf1";
61 reg = <0x02804000 0x800>,
62 <0x02801200 0x020>,
63 <0x02801260 0x020>;
64 interrupts = <57>;
65 clock-frequency = <100000>;
66 };
67
68 - |
69 i2c@2808800 {
70 compatible = "mellanox,i2c-mlxbf2";
71 reg = <0x02808800 0x600>,
72 <0x02808e00 0x020>,
73 <0x02808e20 0x020>,
74 <0x02808e40 0x010>;
75 interrupts = <57>;
76 clock-frequency = <400000>;
77 };
Cache object: 0026e8f8ded97390ab245d1eb23a15ea
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