The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/i2c/qcom,i2c-qup.yaml

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    1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Qualcomm Universal Peripheral (QUP) I2C controller
    8 
    9 maintainers:
   10   - Andy Gross <agross@kernel.org>
   11   - Bjorn Andersson <bjorn.andersson@linaro.org>
   12   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
   13 
   14 allOf:
   15   - $ref: /schemas/i2c/i2c-controller.yaml#
   16 
   17 properties:
   18   compatible:
   19     enum:
   20       - qcom,i2c-qup-v1.1.1     # for 8660, 8960 and 8064
   21       - qcom,i2c-qup-v2.1.1     # for 8974 v1
   22       - qcom,i2c-qup-v2.2.1     # for 8974 v2 and later
   23 
   24   clocks:
   25     maxItems: 2
   26 
   27   clock-names:
   28     items:
   29       - const: core
   30       - const: iface
   31 
   32   clock-frequency:
   33     default: 100000
   34 
   35   dmas:
   36     maxItems: 2
   37 
   38   dma-names:
   39     items:
   40       - const: tx
   41       - const: rx
   42 
   43   interrupts:
   44     maxItems: 1
   45 
   46   pinctrl-0: true
   47   pinctrl-1: true
   48 
   49   pinctrl-names:
   50     minItems: 1
   51     items:
   52       - const: default
   53       - const: sleep
   54 
   55   reg:
   56     maxItems: 1
   57 
   58 required:
   59   - compatible
   60   - clock-names
   61   - clocks
   62   - interrupts
   63   - reg
   64 
   65 unevaluatedProperties: false
   66 
   67 examples:
   68   - |
   69     #include <dt-bindings/clock/qcom,gcc-msm8998.h>
   70     #include <dt-bindings/interrupt-controller/arm-gic.h>
   71 
   72     i2c@c175000 {
   73         compatible = "qcom,i2c-qup-v2.2.1";
   74         reg = <0x0c175000 0x600>;
   75         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
   76 
   77         clocks = <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>,
   78                  <&gcc GCC_BLSP1_AHB_CLK>;
   79         clock-names = "core", "iface";
   80         dmas = <&blsp1_dma 6>, <&blsp1_dma 7>;
   81         dma-names = "tx", "rx";
   82         pinctrl-names = "default", "sleep";
   83         pinctrl-0 = <&blsp1_i2c1_default>;
   84         pinctrl-1 = <&blsp1_i2c1_sleep>;
   85         clock-frequency = <400000>;
   86 
   87         #address-cells = <1>;
   88         #size-cells = <0>;
   89     };

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