1 Bindings for Synopsys DesignWare I3C master block
2 =================================================
3
4 Required properties:
5 --------------------
6 - compatible: shall be "snps,dw-i3c-master-1.00a"
7 - clocks: shall reference the core_clk
8 - interrupts: the interrupt line connected to this I3C master
9 - reg: Offset and length of I3C master registers
10
11 Mandatory properties defined by the generic binding (see
12 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
13
14 - #address-cells: shall be set to 3
15 - #size-cells: shall be set to 0
16
17 Optional properties defined by the generic binding (see
18 Documentation/devicetree/bindings/i3c/i3c.yaml for more details):
19
20 - i2c-scl-hz
21 - i3c-scl-hz
22
23 I3C device connected on the bus follow the generic description (see
24 Documentation/devicetree/bindings/i3c/i3c.yaml for more details).
25
26 Example:
27
28 i3c-master@2000 {
29 compatible = "snps,dw-i3c-master-1.00a";
30 #address-cells = <3>;
31 #size-cells = <0>;
32 reg = <0x02000 0x1000>;
33 interrupts = <0>;
34 clocks = <&i3cclk>;
35
36 eeprom@57{
37 compatible = "atmel,24c01";
38 reg = <0x57 0x0 0x10>;
39 pagesize = <0x8>;
40 };
41 };
Cache object: aefbefa6a0bcdf4c474b1fcc770de685
|