The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/iio/adc/nuvoton,npcm750-adc.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Nuvoton NPCM BMC Analog to Digital Converter (ADC)
    8 
    9 maintainers:
   10   - Tomer Maimon <tmaimon77@gmail.com>
   11 
   12 description:
   13   The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter,
   14   both have eight channel inputs.
   15 
   16 properties:
   17   compatible:
   18     enum:
   19       - nuvoton,npcm750-adc
   20       - nuvoton,npcm845-adc
   21 
   22   reg:
   23     maxItems: 1
   24 
   25   interrupts:
   26     maxItems: 1
   27     description: ADC interrupt, should be set for falling edge.
   28 
   29   resets:
   30     maxItems: 1
   31 
   32   clocks:
   33     maxItems: 1
   34     description: If not provided the defulat ADC sample rate will be used.
   35 
   36   vref-supply:
   37     description: If not supplied, the internal voltage reference will be used.
   38 
   39   "#io-channel-cells":
   40     const: 1
   41 
   42 required:
   43   - compatible
   44   - reg
   45   - interrupts
   46   - resets
   47 
   48 additionalProperties: false
   49 
   50 examples:
   51   - |
   52     #include <dt-bindings/interrupt-controller/irq.h>
   53     #include <dt-bindings/interrupt-controller/arm-gic.h>
   54     #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
   55     #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
   56     soc {
   57         #address-cells = <1>;
   58         #size-cells = <1>;
   59         adc@f000c000 {
   60             compatible = "nuvoton,npcm750-adc";
   61             reg = <0xf000c000 0x8>;
   62             interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
   63             clocks = <&clk NPCM7XX_CLK_ADC>;
   64             resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>;
   65         };
   66     };
   67 ...

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