rockchip-saradc.yaml

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    1 # SPDX-License-Identifier: GPL-2.0
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Rockchip Successive Approximation Register (SAR) A/D Converter
    8 
    9 maintainers:
   10   - Heiko Stuebner <heiko@sntech.de>
   11 
   12 properties:
   13   compatible:
   14     oneOf:
   15       - const: rockchip,saradc
   16       - const: rockchip,rk3066-tsadc
   17       - const: rockchip,rk3399-saradc
   18       - items:
   19           - enum:
   20               - rockchip,px30-saradc
   21               - rockchip,rk3308-saradc
   22               - rockchip,rk3328-saradc
   23               - rockchip,rk3568-saradc
   24               - rockchip,rv1108-saradc
   25           - const: rockchip,rk3399-saradc
   26 
   27   reg:
   28     maxItems: 1
   29 
   30   interrupts:
   31     maxItems: 1
   32 
   33   clocks:
   34     items:
   35       - description: converter clock
   36       - description: peripheral clock
   37 
   38   clock-names:
   39     items:
   40       - const: saradc
   41       - const: apb_pclk
   42 
   43   resets:
   44     maxItems: 1
   45 
   46   reset-names:
   47     const: saradc-apb
   48 
   49   vref-supply:
   50     description:
   51       The regulator supply for the ADC reference voltage.
   52 
   53   "#io-channel-cells":
   54     const: 1
   55 
   56 required:
   57   - compatible
   58   - reg
   59   - interrupts
   60   - clocks
   61   - clock-names
   62   - vref-supply
   63   - "#io-channel-cells"
   64 
   65 additionalProperties: false
   66 
   67 examples:
   68   - |
   69     #include <dt-bindings/clock/rk3288-cru.h>
   70     #include <dt-bindings/interrupt-controller/arm-gic.h>
   71     saradc: saradc@2006c000 {
   72       compatible = "rockchip,saradc";
   73       reg = <0x2006c000 0x100>;
   74       interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
   75       clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
   76       clock-names = "saradc", "apb_pclk";
   77       resets = <&cru SRST_SARADC>;
   78       reset-names = "saradc-apb";
   79       vref-supply = <&vcc18>;
   80       #io-channel-cells = <1>;
   81     };

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sys/contrib/device-tree/Bindings/iio/adc/rockchip-saradc.yaml