1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
8
9 maintainers:
10 - Tomislav Denis <tomislav.denis@avl.com>
11
12 description: |
13 The ADS131E0x are a family of multichannel, simultaneous sampling,
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
16 and an onboard oscillator.
17 The communication with ADC chip is via the SPI bus (mode 1).
18
19 https://www.ti.com/lit/ds/symlink/ads131e08.pdf
20
21 properties:
22 compatible:
23 enum:
24 - ti,ads131e04
25 - ti,ads131e06
26 - ti,ads131e08
27
28 reg:
29 maxItems: 1
30
31 spi-max-frequency: true
32
33 spi-cpha: true
34
35 clocks:
36 description: |
37 Device tree identifier to the clock source (2.048 MHz).
38 Note: clock source is selected using CLKSEL pin.
39 maxItems: 1
40
41 clock-names:
42 items:
43 - const: adc-clk
44
45 interrupts:
46 description: |
47 IRQ line for the ADC data ready.
48 maxItems: 1
49
50 vref-supply:
51 description: |
52 Optional external voltage reference. If not supplied, internal voltage
53 reference is used.
54
55 ti,vref-internal:
56 description: |
57 Select the internal voltage reference value.
58 0: 2.4V
59 1: 4.0V
60 If this field is left empty, 2.4V is selected.
61 Note: internal voltage reference is used only if vref-supply is not supplied.
62 $ref: /schemas/types.yaml#/definitions/uint32
63 enum: [0, 1]
64 default: 0
65
66 '#address-cells':
67 const: 1
68
69 '#size-cells':
70 const: 0
71
72 required:
73 - compatible
74 - reg
75 - spi-cpha
76 - clocks
77 - clock-names
78 - interrupts
79
80 patternProperties:
81 "^channel@([0-7])$":
82 $ref: "adc.yaml"
83 type: object
84 description: |
85 Represents the external channels which are connected to the ADC.
86
87 properties:
88 reg:
89 description: |
90 The channel number.
91 Up to 4 channels, numbered from 0 to 3 for ti,ads131e04.
92 Up to 6 channels, numbered from 0 to 5 for ti,ads131e06.
93 Up to 8 channels, numbered from 0 to 7 for ti,ads131e08.
94 items:
95 minimum: 0
96 maximum: 7
97
98 ti,gain:
99 description: |
100 The PGA gain value for the channel.
101 If this field is left empty, PGA gain 1 is used.
102 $ref: /schemas/types.yaml#/definitions/uint32
103 enum: [1, 2, 4, 8, 12]
104 default: 1
105
106 ti,mux:
107 description: |
108 Channel input selection(muliplexer).
109 0: Normal input.
110 1: Input shorted to (VREFP + VREFN) / 2 (for offset or noise measurements).
111 3: MVDD (for supply measurement)
112 4: Temperature sensor
113 If this field is left empty, normal input is selected.
114 $ref: /schemas/types.yaml#/definitions/uint32
115 enum: [0, 1, 3, 4]
116 default: 0
117
118 required:
119 - reg
120
121 additionalProperties: false
122
123 additionalProperties: false
124
125 examples:
126 - |
127 #include <dt-bindings/interrupt-controller/irq.h>
128
129 spi {
130 #address-cells = <1>;
131 #size-cells = <0>;
132
133 adc@0 {
134 compatible = "ti,ads131e08";
135 reg = <0>;
136 spi-max-frequency = <1000000>;
137 spi-cpha;
138 clocks = <&clk2048k>;
139 clock-names = "adc-clk";
140 interrupt-parent = <&gpio5>;
141 interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
142 vref-supply = <&adc_vref>;
143
144 #address-cells = <1>;
145 #size-cells = <0>;
146
147 channel@0 {
148 reg = <0>;
149 };
150
151 channel@1 {
152 reg = <1>;
153 };
154
155 channel@2 {
156 reg = <2>;
157 ti,gain = <2>;
158 };
159
160 channel@3 {
161 reg = <3>;
162 };
163
164 channel@4 {
165 reg = <4>;
166 };
167
168 channel@5 {
169 reg = <5>;
170 };
171
172 channel@6 {
173 reg = <6>;
174 };
175
176 channel@7 {
177 reg = <7>;
178 ti,mux = <4>;
179 };
180 };
181 };
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