1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/iio/frequency/adi,admv1014.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: ADMV1014 Microwave Downconverter
8
9 maintainers:
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
11
12 description: |
13 Wideband, microwave downconverter optimized for point to point microwave
14 radio designs operating in the 24 GHz to 44 GHz frequency range.
15
16 https://www.analog.com/en/products/admv1014.html
17
18 properties:
19 compatible:
20 enum:
21 - adi,admv1014
22
23 reg:
24 maxItems: 1
25
26 spi-max-frequency:
27 maximum: 1000000
28
29 clocks:
30 maxItems: 1
31
32 clock-names:
33 items:
34 - const: lo_in
35 description:
36 External clock that provides the Local Oscilator input.
37
38 vcm-supply:
39 description:
40 Common-mode voltage regulator.
41
42 vcc-if-bb-supply:
43 description:
44 BB and IF supply voltage regulator.
45
46 vcc-vga-supply:
47 description:
48 RF Amplifier supply voltage regulator.
49
50 vcc-vva-supply:
51 description:
52 VVA Control Circuit supply voltage regulator.
53
54 vcc-lna-3p3-supply:
55 description:
56 Low Noise Amplifier 3.3V supply voltage regulator.
57
58 vcc-lna-1p5-supply:
59 description:
60 Low Noise Amplifier 1.5V supply voltage regulator.
61
62 vcc-bg-supply:
63 description:
64 Band Gap Circuit supply voltage regulator.
65
66 vcc-quad-supply:
67 description:
68 Quadruple supply voltage regulator.
69
70 vcc-mixer-supply:
71 description:
72 Mixer supply voltage regulator.
73
74 adi,input-mode:
75 description:
76 Select the input mode.
77 iq - in-phase quadrature (I/Q) input
78 if - complex intermediate frequency (IF) input
79 enum: [iq, if]
80
81 adi,detector-enable:
82 description:
83 Digital Rx Detector Enable. The Square Law Detector output is
84 available at output pin VDET.
85 type: boolean
86
87 adi,p1db-compensation-enable:
88 description:
89 Turn on bits to optimize P1dB.
90 type: boolean
91
92 adi,quad-se-mode:
93 description:
94 Switch the LO path from differential to single-ended operation.
95 se-neg - Single-Ended Mode, Negative Side Disabled.
96 se-pos - Single-Ended Mode, Positive Side Disabled.
97 diff - Differential Mode.
98 enum: [se-neg, se-pos, diff]
99
100 required:
101 - compatible
102 - reg
103 - clocks
104 - clock-names
105 - vcm-supply
106
107 additionalProperties: false
108
109 examples:
110 - |
111 spi {
112 #address-cells = <1>;
113 #size-cells = <0>;
114 converter@0 {
115 compatible = "adi,admv1014";
116 reg = <0>;
117 spi-max-frequency = <1000000>;
118 clocks = <&admv1014_lo>;
119 clock-names = "lo_in";
120 vcm-supply = <&vcm>;
121 vcc-if-bb-supply = <&vcc_if_bb>;
122 vcc-vga-supply = <&vcc_vga>;
123 vcc-vva-supply = <&vcc_vva>;
124 vcc-lna-3p3-supply = <&vcc_lna_3p3>;
125 vcc-lna-1p5-supply = <&vcc_lna_1p5>;
126 vcc-bg-supply = <&vcc_bg>;
127 vcc-quad-supply = <&vcc_quad>;
128 vcc-mixer-supply = <&vcc_mixer>;
129 adi,quad-se-mode = "diff";
130 adi,detector-enable;
131 adi,p1db-compensation-enable;
132 };
133 };
134 ...
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