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     1 Analog Devices AD2S90 Resolver-to-Digital Converter
    2 
    3 https://www.analog.com/en/products/ad2s90.html
    4 
    5 Required properties:
    6   - compatible: should be "adi,ad2s90"
    7   - reg: SPI chip select number for the device
    8   - spi-max-frequency: set maximum clock frequency, must be 830000
    9   - spi-cpol and spi-cpha:
   10         Either SPI mode (0,0) or (1,1) must be used, so specify none or both of
   11         spi-cpha, spi-cpol.
   12 
   13 See for more details:
   14     Documentation/devicetree/bindings/spi/spi-bus.txt
   15 
   16 Note about max frequency:
   17     Chip's max frequency, as specified in its datasheet, is 2Mhz. But a 600ns
   18     delay is expected between the application of a logic LO to CS and the
   19     application of SCLK, as also specified. And since the delay is not
   20     implemented in the spi code, to satisfy it, SCLK's period should be at most
   21     2 * 600ns, so the max frequency should be 1 / (2 * 6e-7), which gives
   22     roughly 830000Hz.
   23 
   24 Example:
   25 resolver@0 {
   26         compatible = "adi,ad2s90";
   27         reg = <0>;
   28         spi-max-frequency = <830000>;
   29         spi-cpol;
   30         spi-cpha;
   31 };
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