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     1 * Marvell MMP Interrupt controller
    2 
    3 Required properties:
    4 - compatible : Should be
    5                "mrvl,mmp-intc" on Marvel MMP,
    6                "mrvl,mmp2-intc" along with "mrvl,mmp2-mux-intc" on MMP2 or
    7                "marvell,mmp3-intc" with "mrvl,mmp2-mux-intc" on MMP3
    8 - reg : Address and length of the register set of the interrupt controller.
    9   If the interrupt controller is intc, address and length means the range
   10   of the whole interrupt controller. The "marvell,mmp3-intc" controller
   11   also has a secondary range for the second CPU core.  If the interrupt
   12   controller is mux-intc, address and length means one register. Since
   13   address of mux-intc is in the range of intc. mux-intc is secondary
   14   interrupt controller.
   15 - reg-names : Name of the register set of the interrupt controller. It's
   16   only required in mux-intc interrupt controller.
   17 - interrupts : Should be the port interrupt shared by mux interrupts. It's
   18   only required in mux-intc interrupt controller.
   19 - interrupt-controller : Identifies the node as an interrupt controller.
   20 - #interrupt-cells : Specifies the number of cells needed to encode an
   21   interrupt source.
   22 - mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt
   23   controller.
   24 - mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge
   25   detection first.
   26 
   27 Example:
   28         intc: interrupt-controller@d4282000 {
   29                 compatible = "mrvl,mmp2-intc";
   30                 interrupt-controller;
   31                 #interrupt-cells = <1>;
   32                 reg = <0xd4282000 0x1000>;
   33                 mrvl,intc-nr-irqs = <64>;
   34         };
   35 
   36         intcmux4@d4282150 {
   37                 compatible = "mrvl,mmp2-mux-intc";
   38                 interrupts = <4>;
   39                 interrupt-controller;
   40                 #interrupt-cells = <1>;
   41                 reg = <0x150 0x4>, <0x168 0x4>;
   42                 reg-names = "mux status", "mux mask";
   43                 mrvl,intc-nr-irqs = <2>;
   44         };
   45 
   46 * Marvell Orion Interrupt controller
   47 
   48 Required properties
   49 - compatible :  Should be "marvell,orion-intc".
   50 - #interrupt-cells: Specifies the number of cells needed to encode an
   51   interrupt source. Supported value is <1>.
   52 - interrupt-controller : Declare this node to be an interrupt controller.
   53 - reg : Interrupt mask address. A list of 4 byte ranges, one per controller.
   54         One entry in the list represents 32 interrupts.
   55 
   56 Example:
   57 
   58         intc: interrupt-controller {
   59                 compatible = "marvell,orion-intc", "marvell,intc";
   60                 interrupt-controller;
   61                 #interrupt-cells = <1>;
   62                 reg = <0xfed20204 0x04>,
   63                       <0xfed20214 0x04>;
   64         };
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