qcom-ipcc.yaml

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    1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/mailbox/qcom-ipcc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Qualcomm Technologies, Inc. Inter-Processor Communication Controller
    8 
    9 maintainers:
   10   - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
   11 
   12 description:
   13   The Inter-Processor Communication Controller (IPCC) is a centralized hardware
   14   to route interrupts across various subsystems. It involves a three-level
   15   addressing scheme called protocol, client and signal. For example, consider an
   16   entity on the Application Processor Subsystem (APSS) that wants to listen to
   17   Modem's interrupts via Shared Memory Point to Point (SMP2P) interface. In such
   18   a case, the client would be Modem (client-id is 2) and the signal would be
   19   SMP2P (signal-id is 2). The SMP2P itself falls under the Multiprocessor (MPROC)
   20   protocol (protocol-id is 0). Refer include/dt-bindings/mailbox/qcom-ipcc.h
   21   for the list of such IDs.
   22 
   23 properties:
   24   compatible:
   25     items:
   26       - enum:
   27           - qcom,sm6350-ipcc
   28           - qcom,sm6375-ipcc
   29           - qcom,sm8250-ipcc
   30           - qcom,sm8350-ipcc
   31           - qcom,sm8450-ipcc
   32           - qcom,sc7280-ipcc
   33       - const: qcom,ipcc
   34 
   35   reg:
   36     maxItems: 1
   37 
   38   interrupts:
   39     maxItems: 1
   40 
   41   interrupt-controller: true
   42 
   43   "#interrupt-cells":
   44     const: 3
   45     description:
   46       The first cell is the client-id, the second cell is the signal-id and the
   47       third cell is the interrupt type.
   48 
   49   "#mbox-cells":
   50     const: 2
   51     description:
   52       The first cell is the client-id, and the second cell is the signal-id.
   53 
   54 required:
   55   - compatible
   56   - reg
   57   - interrupts
   58   - interrupt-controller
   59   - "#interrupt-cells"
   60   - "#mbox-cells"
   61 
   62 additionalProperties: false
   63 
   64 examples:
   65   - |
   66     #include <dt-bindings/interrupt-controller/arm-gic.h>
   67     #include <dt-bindings/mailbox/qcom-ipcc.h>
   68 
   69     mailbox@408000 {
   70         compatible = "qcom,sm8250-ipcc", "qcom,ipcc";
   71         reg = <0x408000 0x1000>;
   72         interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
   73         interrupt-controller;
   74         #interrupt-cells = <3>;
   75         #mbox-cells = <2>;
   76     };

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sys/contrib/device-tree/Bindings/mailbox/qcom-ipcc.yaml