allwinner,sun6i-a31-csi.yaml

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    1 # SPDX-License-Identifier: GPL-2.0
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Allwinner A31 CMOS Sensor Interface (CSI) Device Tree Bindings
    8 
    9 maintainers:
   10   - Chen-Yu Tsai <wens@csie.org>
   11   - Maxime Ripard <mripard@kernel.org>
   12 
   13 properties:
   14   compatible:
   15     enum:
   16       - allwinner,sun6i-a31-csi
   17       - allwinner,sun8i-a83t-csi
   18       - allwinner,sun8i-h3-csi
   19       - allwinner,sun8i-v3s-csi
   20       - allwinner,sun50i-a64-csi
   21 
   22   reg:
   23     maxItems: 1
   24 
   25   interrupts:
   26     maxItems: 1
   27 
   28   clocks:
   29     items:
   30       - description: Bus Clock
   31       - description: Module Clock
   32       - description: DRAM Clock
   33 
   34   clock-names:
   35     items:
   36       - const: bus
   37       - const: mod
   38       - const: ram
   39 
   40   resets:
   41     maxItems: 1
   42 
   43   port:
   44     $ref: /schemas/graph.yaml#/$defs/port-base
   45     description: Parallel input port, connect to a parallel sensor
   46 
   47     properties:
   48       endpoint:
   49         $ref: video-interfaces.yaml#
   50         unevaluatedProperties: false
   51 
   52         properties:
   53           bus-width:
   54             enum: [ 8, 10, 12, 16 ]
   55 
   56           pclk-sample: true
   57           hsync-active: true
   58           vsync-active: true
   59 
   60         required:
   61           - bus-width
   62 
   63     unevaluatedProperties: false
   64 
   65   ports:
   66     $ref: /schemas/graph.yaml#/properties/ports
   67 
   68     properties:
   69       port@0:
   70         $ref: "#/properties/port"
   71 
   72       port@1:
   73         $ref: /schemas/graph.yaml#/properties/port
   74         description: MIPI CSI-2 bridge input port
   75 
   76     anyOf:
   77       - required:
   78           - port@0
   79       - required:
   80           - port@1
   81 
   82 required:
   83   - compatible
   84   - reg
   85   - interrupts
   86   - clocks
   87   - clock-names
   88   - resets
   89 
   90 oneOf:
   91   - required:
   92       - ports
   93   - required:
   94       - port
   95 
   96 additionalProperties: false
   97 
   98 examples:
   99   - |
  100     #include <dt-bindings/interrupt-controller/arm-gic.h>
  101     #include <dt-bindings/clock/sun8i-v3s-ccu.h>
  102     #include <dt-bindings/reset/sun8i-v3s-ccu.h>
  103 
  104     csi1: csi@1cb4000 {
  105         compatible = "allwinner,sun8i-v3s-csi";
  106         reg = <0x01cb4000 0x1000>;
  107         interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
  108         clocks = <&ccu CLK_BUS_CSI>,
  109                  <&ccu CLK_CSI1_SCLK>,
  110                  <&ccu CLK_DRAM_CSI>;
  111         clock-names = "bus",
  112                       "mod",
  113                       "ram";
  114         resets = <&ccu RST_BUS_CSI>;
  115 
  116         ports {
  117             #address-cells = <1>;
  118             #size-cells = <0>;
  119 
  120             port@0 {
  121                 reg = <0>;
  122                 /* Parallel bus endpoint */
  123                 csi1_ep: endpoint {
  124                     remote-endpoint = <&adv7611_ep>;
  125                     bus-width = <16>;
  126 
  127                     /*
  128                      * If hsync-active/vsync-active are missing,
  129                      * embedded BT.656 sync is used.
  130                      */
  131                     hsync-active = <0>; /* Active low */
  132                     vsync-active = <0>; /* Active low */
  133                     pclk-sample = <1>;  /* Rising */
  134                 };
  135             };
  136         };
  137     };
  138 
  139 ...

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sys/contrib/device-tree/Bindings/media/allwinner,sun6i-a31-csi.yaml