1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
3 %YAML 1.2
4 ---
5 $id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7
8 title: Marvell MMP2 camera host interface bindings
9
10 maintainers:
11 - Lubomir Rintel <lkundrak@v3.sk>
12
13 properties:
14 $nodename:
15 pattern: '^camera@[a-f0-9]+$'
16
17 compatible:
18 const: marvell,mmp2-ccic
19
20 reg:
21 maxItems: 1
22
23 interrupts:
24 maxItems: 1
25
26 power-domains:
27 maxItems: 1
28
29 port:
30 $ref: /schemas/graph.yaml#/$defs/port-base
31 additionalProperties: false
32
33 properties:
34 endpoint:
35 $ref: video-interfaces.yaml#
36 unevaluatedProperties: false
37
38 properties:
39 hsync-active: true
40 vsync-active: true
41 pclk-sample: true
42 bus-type: true
43
44 clocks:
45 minItems: 1
46 items:
47 - description: AXI bus interface clock
48 - description: Peripheral clock
49 - description: Parallel video bus interface clock
50
51 clock-names:
52 const: axi
53
54 '#clock-cells':
55 const: 0
56
57 clock-output-names:
58 const: mclk
59
60 required:
61 - compatible
62 - reg
63 - interrupts
64 - port
65
66 additionalProperties: false
67
68 examples:
69 - |
70 #include <dt-bindings/clock/marvell,mmp2.h>
71 #include <dt-bindings/power/marvell,mmp2.h>
72
73 camera@d420a000 {
74 compatible = "marvell,mmp2-ccic";
75 reg = <0xd420a000 0x800>;
76 interrupts = <42>;
77 clocks = <&soc_clocks MMP2_CLK_CCIC0>;
78 clock-names = "axi";
79 #clock-cells = <0>;
80 clock-output-names = "mclk";
81 power-domains = <&soc_clocks MMP3_POWER_DOMAIN_CAMERA>;
82
83 port {
84 camera0_0: endpoint {
85 remote-endpoint = <&ov7670_0>;
86 bus-type = <5>; /* Parallel */
87 hsync-active = <1>; /* Active high */
88 vsync-active = <1>; /* Active high */
89 pclk-sample = <0>; /* Falling */
90 };
91 };
92 };
93
94 ...
Cache object: ac4e9308a8175cf34afbfd0212b2cfe7
|