microchip,csi2dc.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/media/microchip,csi2dc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Microchip CSI2 Demux Controller (CSI2DC)
    8 
    9 maintainers:
   10   - Eugen Hristev <eugen.hristev@microchip.com>
   11 
   12 description:
   13   CSI2DC - Camera Serial Interface 2 Demux Controller
   14 
   15   CSI2DC is a hardware block that receives incoming data from either from an
   16   IDI interface or from a parallel bus interface.
   17   It filters IDI packets based on their data type and virtual channel
   18   identifier, then converts the byte stream to a pixel stream into a cross
   19   clock domain towards a parallel interface that can be read by a sensor
   20   controller.
   21   IDI interface is Synopsys proprietary.
   22   CSI2DC can act a simple bypass bridge if the incoming data is coming from
   23   a parallel interface.
   24 
   25   CSI2DC provides two pipes, one video pipe and one data pipe. Video pipe
   26   is connected at the output to a sensor controller and the data pipe is
   27   accessible as a DMA slave port to a DMA controller.
   28 
   29   CSI2DC supports a single 'port' node as a sink port with either Synopsys
   30   32-bit IDI interface or a parallel interface.
   31 
   32   CSI2DC supports one 'port' node as source port with parallel interface.
   33   This is called video pipe.
   34   This port has an 'endpoint' that can be connected to a sink port of another
   35   controller (next in pipeline).
   36 
   37   CSI2DC also supports direct access to the data through AHB, via DMA channel,
   38   called data pipe.
   39   For data pipe to be available, a dma controller and a dma channel must be
   40   referenced.
   41 
   42 properties:
   43   compatible:
   44     const: microchip,sama7g5-csi2dc
   45 
   46   reg:
   47     maxItems: 1
   48 
   49   clocks:
   50     minItems: 2
   51     maxItems: 2
   52 
   53   clock-names:
   54     description:
   55       CSI2DC must have two clocks to function correctly. One clock is the
   56       peripheral clock for the inside functionality of the hardware block.
   57       This is named 'pclk'. The second clock must be the cross domain clock,
   58       in which CSI2DC will perform clock crossing. This clock must be fed
   59       by the next controller in pipeline, which usually is a sensor controller.
   60       Normally this clock should be given by this sensor controller who
   61       is also a clock source. This clock is named 'scck', sensor controller clock.
   62     items:
   63       - const: pclk
   64       - const: scck
   65 
   66   dmas:
   67     maxItems: 1
   68 
   69   dma-names:
   70     const: rx
   71 
   72   ports:
   73     $ref: /schemas/graph.yaml#/properties/ports
   74 
   75     properties:
   76       port@0:
   77         $ref: /schemas/graph.yaml#/$defs/port-base
   78         description:
   79           Input port node, single endpoint describing the input port.
   80 
   81         properties:
   82           endpoint:
   83             $ref: video-interfaces.yaml#
   84             unevaluatedProperties: false
   85             description: Endpoint connected to input device
   86 
   87             properties:
   88               bus-type:
   89                 enum: [4, 5, 6]
   90                 default: 4
   91 
   92               bus-width:
   93                 enum: [8, 9, 10, 11, 12, 13, 14]
   94                 default: 14
   95 
   96               clock-noncontinuous:
   97                 type: boolean
   98                 description:
   99                   Presence of this boolean property decides whether clock is
  100                   continuous or noncontinuous.
  101 
  102               remote-endpoint: true
  103 
  104       port@1:
  105         $ref: /schemas/graph.yaml#/$defs/port-base
  106         description:
  107           Output port node, single endpoint describing the output port.
  108 
  109         properties:
  110           endpoint:
  111             unevaluatedProperties: false
  112             $ref: video-interfaces.yaml#
  113             description: Endpoint connected to output device
  114 
  115             properties:
  116               bus-type:
  117                 enum: [5, 6]
  118                 default: 5
  119 
  120               bus-width:
  121                 enum: [8, 9, 10, 11, 12, 13, 14]
  122                 default: 14
  123 
  124               remote-endpoint: true
  125 
  126     required:
  127       - port@0
  128       - port@1
  129 
  130 additionalProperties: false
  131 
  132 required:
  133   - compatible
  134   - reg
  135   - clocks
  136   - clock-names
  137   - ports
  138 
  139 examples:
  140   # Example for connecting to a parallel sensor controller block (video pipe)
  141   # and the input is received from Synopsys IDI interface
  142   - |
  143     csi2dc@e1404000 {
  144         compatible = "microchip,sama7g5-csi2dc";
  145         reg = <0xe1404000 0x500>;
  146         clocks = <&pclk>, <&scck>;
  147         clock-names = "pclk", "scck";
  148 
  149         ports {
  150                #address-cells = <1>;
  151                #size-cells = <0>;
  152                port@0 {
  153                        reg = <0>; /* must be 0, first child port */
  154                        csi2dc_in: endpoint { /* input from IDI interface */
  155                                bus-type = <4>; /* MIPI CSI2 D-PHY */
  156                                remote-endpoint = <&csi2host_out>;
  157                        };
  158                };
  159 
  160                port@1 {
  161                        reg = <1>; /* must be 1, second child port */
  162                        csi2dc_out: endpoint {
  163                                remote-endpoint = <&xisc_in>; /* output to sensor controller */
  164                        };
  165                };
  166         };
  167     };
  168 
  169   # Example for connecting to a DMA master as an AHB slave
  170   # and the input is received from Synopsys IDI interface
  171   - |
  172     #include <dt-bindings/dma/at91.h>
  173     csi2dc@e1404000 {
  174         compatible = "microchip,sama7g5-csi2dc";
  175         reg = <0xe1404000 0x500>;
  176         clocks = <&pclk>, <&scck>;
  177         clock-names = "pclk", "scck";
  178         dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>;
  179         dma-names = "rx";
  180 
  181         ports {
  182                #address-cells = <1>;
  183                #size-cells = <0>;
  184                port@0 {
  185                        reg = <0>; /* must be 0, first child port */
  186                        csi2dc_input: endpoint { /* input from IDI interface */
  187                                remote-endpoint = <&csi2host_out>;
  188                        };
  189                };
  190 
  191                port@1 {
  192                        reg = <1>;
  193                };
  194         };
  195     };
  196 
  197 ...

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