nvidia,tegra-vde.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/media/nvidia,tegra-vde.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: NVIDIA Tegra Video Decoder Engine
    8 
    9 maintainers:
   10   - Dmitry Osipenko <digetx@gmail.com>
   11   - Jon Hunter <jonathanh@nvidia.com>
   12   - Thierry Reding <thierry.reding@gmail.com>
   13 
   14 properties:
   15   compatible:
   16     oneOf:
   17       - items:
   18           - enum:
   19               - nvidia,tegra132-vde
   20               - nvidia,tegra124-vde
   21               - nvidia,tegra114-vde
   22       - items:
   23           - const: nvidia,tegra30-vde
   24           - const: nvidia,tegra20-vde
   25       - items:
   26           - const: nvidia,tegra20-vde
   27 
   28   reg:
   29     maxItems: 9
   30 
   31   reg-names:
   32     items:
   33       - const: sxe
   34       - const: bsev
   35       - const: mbe
   36       - const: ppe
   37       - const: mce
   38       - const: tfe
   39       - const: ppb
   40       - const: vdma
   41       - const: frameid
   42 
   43   clocks:
   44     maxItems: 1
   45 
   46   resets:
   47     maxItems: 2
   48 
   49   reset-names:
   50     items:
   51       - const: vde
   52       - const: mc
   53 
   54   interrupts:
   55     maxItems: 3
   56 
   57   interrupt-names:
   58     items:
   59       - const: sync-token
   60       - const: bsev
   61       - const: sxe
   62 
   63   iommus:
   64     maxItems: 1
   65 
   66   iram:
   67     $ref: /schemas/types.yaml#/definitions/phandle
   68     description:
   69       Phandle of the SRAM MMIO node.
   70 
   71   operating-points-v2:
   72     description:
   73       Should contain freqs and voltages and opp-supported-hw property,
   74       which is a bitfield indicating SoC speedo or process ID mask.
   75 
   76   power-domains:
   77     maxItems: 1
   78     description:
   79       Phandle to the SoC core power domain.
   80 
   81 required:
   82   - compatible
   83   - reg
   84   - reg-names
   85   - clocks
   86   - resets
   87   - reset-names
   88   - interrupts
   89   - interrupt-names
   90 
   91 additionalProperties: false
   92 
   93 examples:
   94   - |
   95     video-codec@6001a000 {
   96       compatible = "nvidia,tegra20-vde";
   97       reg = <0x6001a000 0x1000>, /* Syntax Engine */
   98             <0x6001b000 0x1000>, /* Video Bitstream Engine */
   99             <0x6001c000  0x100>, /* Macroblock Engine */
  100             <0x6001c200  0x100>, /* Post-processing Engine */
  101             <0x6001c400  0x100>, /* Motion Compensation Engine */
  102             <0x6001c600  0x100>, /* Transform Engine */
  103             <0x6001c800  0x100>, /* Pixel prediction block */
  104             <0x6001ca00  0x100>, /* Video DMA */
  105             <0x6001d800  0x300>; /* Video frame controls */
  106       reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
  107                   "tfe", "ppb", "vdma", "frameid";
  108       iram = <&iram>; /* IRAM MMIO region */
  109       interrupts = <0  9 4>, /* Sync token */
  110                    <0 10 4>, /* BSE-V */
  111                    <0 12 4>; /* SXE */
  112       interrupt-names = "sync-token", "bsev", "sxe";
  113       clocks = <&clk 61>;
  114       reset-names = "vde", "mc";
  115       resets = <&rst 61>, <&mem 13>;
  116       iommus = <&mem 15>;
  117       operating-points-v2 = <&dvfs_opp_table>;
  118       power-domains = <&domain>;
  119     };

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sys/contrib/device-tree/Bindings/media/nvidia,tegra-vde.yaml