The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/media/renesas,jpu.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/media/renesas,jpu.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Renesas JPEG Processing Unit
    8 
    9 maintainers:
   10   - Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
   11 
   12 description:
   13   The JPEG processing unit (JPU) incorporates the JPEG codec with an encoding
   14   and decoding function conforming to the JPEG baseline process, so that the
   15   JPU can encode image data and decode JPEG data quickly.
   16 
   17 properties:
   18   compatible:
   19     items:
   20       - enum:
   21           - renesas,jpu-r8a7790      # R-Car H2
   22           - renesas,jpu-r8a7791      # R-Car M2-W
   23           - renesas,jpu-r8a7792      # R-Car V2H
   24           - renesas,jpu-r8a7793      # R-Car M2-N
   25       - const: renesas,rcar-gen2-jpu # R-Car Gen2
   26 
   27   reg:
   28     maxItems: 1
   29 
   30   interrupts:
   31     maxItems: 1
   32 
   33   clocks:
   34     maxItems: 1
   35 
   36   power-domains:
   37     maxItems: 1
   38 
   39   resets:
   40     maxItems: 1
   41 
   42 required:
   43   - compatible
   44   - reg
   45   - interrupts
   46   - clocks
   47   - power-domains
   48   - resets
   49 
   50 additionalProperties: false
   51 
   52 examples:
   53   - |
   54     #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
   55     #include <dt-bindings/interrupt-controller/arm-gic.h>
   56     #include <dt-bindings/power/r8a7790-sysc.h>
   57 
   58     jpeg-codec@fe980000 {
   59             compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
   60             reg = <0xfe980000 0x10300>;
   61             interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
   62             clocks = <&cpg CPG_MOD 106>;
   63             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
   64             resets = <&cpg 106>;
   65     };

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