FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml

     # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
     %YAML 1.2
     ---
     $id: http://devicetree.org/schemas/mfd/brcm,bcm63268-gpio-sysctl.yaml#
     $schema: http://devicetree.org/meta-schemas/core.yaml#
     
     title: Broadcom BCM63268 GPIO System Controller Device Tree Bindings
     
     maintainers:
      - Álvaro Fernández Rojas <noltari@gmail.com>
      - Jonas Gorski <jonas.gorski@gmail.com>
    
    description:
      Broadcom BCM63268 SoC GPIO system controller which provides a register map
      for controlling the GPIO and pins of the SoC.
    
    properties:
      "#address-cells": true
    
      "#size-cells": true
    
      compatible:
        items:
          - const: brcm,bcm63268-gpio-sysctl
          - const: syscon
          - const: simple-mfd
    
      ranges:
        maxItems: 1
    
      reg:
        maxItems: 1
    
    patternProperties:
      "^gpio@[0-9a-f]+$":
        # Child node
        type: object
        $ref: "../gpio/brcm,bcm6345-gpio.yaml"
        description:
          GPIO controller for the SoC GPIOs. This child node definition
          should follow the bindings specified in
          Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
    
      "^pinctrl@[0-9a-f]+$":
        # Child node
        type: object
        $ref: "../pinctrl/brcm,bcm63268-pinctrl.yaml"
        description:
          Pin controller for the SoC pins. This child node definition
          should follow the bindings specified in
          Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml.
    
    required:
      - "#address-cells"
      - compatible
      - ranges
      - reg
      - "#size-cells"
    
    additionalProperties: false
    
    examples:
      - |
        syscon@100000c0 {
          #address-cells = <1>;
          #size-cells = <1>;
          compatible = "brcm,bcm63268-gpio-sysctl", "syscon", "simple-mfd";
          reg = <0x100000c0 0x80>;
          ranges = <0 0x100000c0 0x80>;
    
          gpio@0 {
            compatible = "brcm,bcm63268-gpio";
            reg-names = "dirout", "dat";
            reg = <0x0 0x8>, <0x8 0x8>;
    
            gpio-controller;
            gpio-ranges = <&pinctrl 0 0 52>;
            #gpio-cells = <2>;
          };
    
          pinctrl: pinctrl@10 {
            compatible = "brcm,bcm63268-pinctrl";
            reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>;
    
            pinctrl_serial_led: serial_led-pins {
              pinctrl_serial_led_clk: serial_led_clk-pins {
                function = "serial_led_clk";
                pins = "gpio0";
              };
    
              pinctrl_serial_led_data: serial_led_data-pins {
                function = "serial_led_data";
                pins = "gpio1";
              };
            };
    
            pinctrl_hsspi_cs4: hsspi_cs4-pins {
              function = "hsspi_cs4";
              pins = "gpio16";
           };
   
           pinctrl_hsspi_cs5: hsspi_cs5-pins {
             function = "hsspi_cs5";
             pins = "gpio17";
           };
   
           pinctrl_hsspi_cs6: hsspi_cs6-pins {
             function = "hsspi_cs6";
             pins = "gpio8";
           };
   
           pinctrl_hsspi_cs7: hsspi_cs7-pins {
             function = "hsspi_cs7";
             pins = "gpio9";
           };
   
           pinctrl_adsl_spi: adsl_spi-pins {
             pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
               function = "adsl_spi_miso";
               pins = "gpio18";
             };
   
             pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
               function = "adsl_spi_mosi";
               pins = "gpio19";
             };
           };
   
           pinctrl_vreq_clk: vreq_clk-pins {
             function = "vreq_clk";
             pins = "gpio22";
           };
   
           pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins {
             function = "pcie_clkreq_b";
             pins = "gpio23";
           };
   
           pinctrl_robosw_led_clk: robosw_led_clk-pins {
             function = "robosw_led_clk";
             pins = "gpio30";
           };
   
           pinctrl_robosw_led_data: robosw_led_data-pins {
             function = "robosw_led_data";
             pins = "gpio31";
           };
   
           pinctrl_nand: nand-pins {
             function = "nand";
             group = "nand_grp";
           };
   
           pinctrl_gpio35_alt: gpio35_alt-pins {
             function = "gpio35_alt";
             pin = "gpio35";
           };
   
           pinctrl_dectpd: dectpd-pins {
             function = "dectpd";
             group = "dectpd_grp";
           };
   
           pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins {
             function = "vdsl_phy_override_0";
             group = "vdsl_phy_override_0_grp";
           };
   
           pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins {
             function = "vdsl_phy_override_1";
             group = "vdsl_phy_override_1_grp";
           };
   
           pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins {
             function = "vdsl_phy_override_2";
             group = "vdsl_phy_override_2_grp";
           };
   
           pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins {
             function = "vdsl_phy_override_3";
             group = "vdsl_phy_override_3_grp";
           };
   
           pinctrl_dsl_gpio8: dsl_gpio8-pins {
             function = "dsl_gpio8";
             group = "dsl_gpio8";
           };
   
           pinctrl_dsl_gpio9: dsl_gpio9-pins {
             function = "dsl_gpio9";
             group = "dsl_gpio9";
           };
         };
       };

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