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     1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/mfd/brcm,cru.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Broadcom CRU
    8 
    9 maintainers:
   10   - Rafał Miłecki <rafal@milecki.pl>
   11 
   12 description: |
   13   Broadcom CRU ("Clock and Reset Unit" or "Central Resource Unit") is a hardware
   14   block grouping smaller blocks. On Broadcom Northstar platform it contains e.g.
   15   clocks, pinctrl, USB PHY and thermal.
   16 
   17 properties:
   18   compatible:
   19     items:
   20       - enum:
   21           - brcm,ns-cru
   22       - const: simple-mfd
   23 
   24   reg:
   25     description: CRU registers
   26 
   27   ranges: true
   28 
   29   "#address-cells":
   30     const: 1
   31 
   32   "#size-cells":
   33     const: 1
   34 
   35 patternProperties:
   36   '^clock-controller@[a-f0-9]+$':
   37     $ref: ../clock/brcm,iproc-clocks.yaml
   38 
   39   '^phy@[a-f0-9]+$':
   40     $ref: ../phy/bcm-ns-usb2-phy.yaml
   41 
   42   '^pinctrl@[a-f0-9]+$':
   43     $ref: ../pinctrl/brcm,ns-pinmux.yaml
   44 
   45   '^syscon@[a-f0-9]+$':
   46     $ref: syscon.yaml
   47 
   48   '^thermal@[a-f0-9]+$':
   49     $ref: ../thermal/brcm,ns-thermal.yaml
   50 
   51 additionalProperties: false
   52 
   53 required:
   54   - reg
   55 
   56 examples:
   57   - |
   58     #include <dt-bindings/clock/bcm-nsp.h>
   59     cru-bus@1800c100 {
   60         compatible = "brcm,ns-cru", "simple-mfd";
   61         reg = <0x1800c100 0x1d0>;
   62         ranges;
   63         #address-cells = <1>;
   64         #size-cells = <1>;
   65 
   66         clock-controller@100 {
   67             #clock-cells = <1>;
   68             compatible = "brcm,nsp-lcpll0";
   69             reg = <0x100 0x14>;
   70             clocks = <&osc>;
   71             clock-output-names = "lcpll0", "pcie_phy", "sdio", "ddr_phy";
   72         };
   73 
   74         clock-controller@140 {
   75             #clock-cells = <1>;
   76             compatible = "brcm,nsp-genpll";
   77             reg = <0x140 0x24>;
   78             clocks = <&osc>;
   79             clock-output-names = "genpll", "phy", "ethernetclk", "usbclk",
   80                                  "iprocfast", "sata1", "sata2";
   81         };
   82 
   83         phy@164 {
   84             compatible = "brcm,ns-usb2-phy";
   85             reg = <0x164 0x4>;
   86             brcm,syscon-clkset = <&clkset>;
   87             clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
   88             clock-names = "phy-ref-clk";
   89             #phy-cells = <0>;
   90         };
   91 
   92         clkset: syscon@180 {
   93             compatible = "brcm,cru-clkset", "syscon";
   94             reg = <0x180 0x4>;
   95         };
   96 
   97         pinctrl@1c0 {
   98             compatible = "brcm,bcm4708-pinmux";
   99             reg = <0x1c0 0x24>;
  100             reg-names = "cru_gpio_control";
  101         };
  102 
  103         thermal@2c0 {
  104             compatible = "brcm,ns-thermal";
  105             reg = <0x2c0 0x10>;
  106             #thermal-sensor-cells = <0>;
  107         };
  108     };
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