1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mfd/stericsson,db8500-prcmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: ST-Ericsson DB8500 PRCMU - Power Reset and Control Management Unit
8
9 maintainers:
10 - Linus Walleij <linus.walleij@linaro.org>
11
12 description:
13 The DB8500 Power Reset and Control Management Unit is an XP70 8-bit
14 microprocessor that is embedded in the always-on power domain of the
15 DB8500 SoCs to manage the low power states, powering up and down parts
16 of the silicon, and controlling reset of different IP blocks.
17
18 properties:
19 $nodename:
20 pattern: '^prcmu@[0-9a-f]+$'
21
22 compatible:
23 description: The device is compatible both to the device-specific
24 compatible "stericsson,db8500-prcmu" and "syscon". The latter
25 compatible is needed for the device to be exposed as a system
26 controller so that arbitrary registers can be access by
27 different operating system components.
28 items:
29 - const: stericsson,db8500-prcmu
30 - const: syscon
31
32 reg:
33 items:
34 - description: Main PRCMU register area
35 - description: PRCMU TCPM register area
36 - description: PRCMU TCDM register area
37
38 reg-names:
39 items:
40 - const: prcmu
41 - const: prcmu-tcpm
42 - const: prcmu-tcdm
43
44 interrupts:
45 maxItems: 1
46
47 '#address-cells':
48 const: 1
49
50 '#size-cells':
51 const: 1
52
53 ranges: true
54
55 interrupt-controller: true
56
57 '#interrupt-cells':
58 const: 2
59
60 db8500-prcmu-regulators:
61 description: Node describing the DB8500 regulators. These are mainly
62 power rails inside the silicon but some of those are also routed
63 out to external pins.
64 type: object
65
66 properties:
67 compatible:
68 const: stericsson,db8500-prcmu-regulator
69
70 db8500_vape:
71 description: The voltage for the application processor, the
72 main voltage domain for the chip.
73 type: object
74 $ref: ../regulator/regulator.yaml#
75
76 db8500_varm:
77 description: The voltage for the ARM Cortex A-9 CPU.
78 type: object
79 $ref: ../regulator/regulator.yaml#
80
81 db8500_vmodem:
82 description: The voltage for the modem subsystem.
83 type: object
84 $ref: ../regulator/regulator.yaml#
85
86 db8500_vpll:
87 description: The voltage for the phase locked loop clocks.
88 type: object
89 $ref: ../regulator/regulator.yaml#
90
91 db8500_vsmps1:
92 description: Also known as VIO12, is a step-down voltage regulator
93 for 1.2V I/O. SMPS means System Management Power Source.
94 type: object
95 $ref: ../regulator/regulator.yaml#
96
97 db8500_vsmps2:
98 description: Also known as VIO18, is a step-down voltage regulator
99 for 1.8V I/O. SMPS means System Management Power Source.
100 type: object
101 $ref: ../regulator/regulator.yaml#
102
103 db8500_vsmps3:
104 description: This is a step-down voltage regulator
105 for 0.87 thru 1.875V I/O. SMPS means System Management Power Source.
106 type: object
107 $ref: ../regulator/regulator.yaml#
108
109 db8500_vrf1:
110 description: RF transciever voltage regulator.
111 type: object
112 $ref: ../regulator/regulator.yaml#
113
114 db8500_sva_mmdsp:
115 description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP)
116 voltage regulator. This is the voltage for the accelerator DSP
117 for video encoding and decoding.
118 type: object
119 $ref: ../regulator/regulator.yaml#
120
121 db8500_sva_mmdsp_ret:
122 description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP)
123 voltage regulator for retention mode.
124 type: object
125 $ref: ../regulator/regulator.yaml#
126
127 db8500_sva_pipe:
128 description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP)
129 voltage regulator for the data pipe.
130 type: object
131 $ref: ../regulator/regulator.yaml#
132
133 db8500_sia_mmdsp:
134 description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP)
135 voltage regulator. This is the voltage for the accelerator DSP
136 for image encoding and decoding.
137 type: object
138 $ref: ../regulator/regulator.yaml#
139
140 db8500_sia_mmdsp_ret:
141 description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP)
142 voltage regulator for retention mode.
143 type: object
144 $ref: ../regulator/regulator.yaml#
145
146 db8500_sia_pipe:
147 description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP)
148 voltage regulator for the data pipe.
149 type: object
150 $ref: ../regulator/regulator.yaml#
151
152 db8500_sga:
153 description: Smart Graphics Accelerator (SGA) voltage regulator.
154 This is in effect controlling the power to the MALI400 3D
155 accelerator block.
156 type: object
157 $ref: ../regulator/regulator.yaml#
158
159 db8500_b2r2_mcde:
160 description: Blit Blend Rotate and Rescale (B2R2), and Multi-Channel
161 Display Engine (MCDE) voltage regulator. These are two graphics
162 blocks.
163 type: object
164 $ref: ../regulator/regulator.yaml#
165
166 db8500_esram12:
167 description: Embedded Static RAM (ESRAM) 1 and 2 voltage regulator.
168 type: object
169 $ref: ../regulator/regulator.yaml#
170
171 db8500_esram12_ret:
172 description: Embedded Static RAM (ESRAM) 1 and 2 voltage regulator for
173 retention mode.
174 type: object
175 $ref: ../regulator/regulator.yaml#
176
177 db8500_esram34:
178 description: Embedded Static RAM (ESRAM) 3 and 4 voltage regulator.
179 type: object
180 $ref: ../regulator/regulator.yaml#
181
182 db8500_esram34_ret:
183 description: Embedded Static RAM (ESRAM) 3 and 4 voltage regulator for
184 retention mode.
185 type: object
186 $ref: ../regulator/regulator.yaml#
187
188 required:
189 - compatible
190 - db8500_vape
191 - db8500_varm
192 - db8500_vmodem
193 - db8500_vpll
194 - db8500_vsmps1
195 - db8500_vsmps2
196 - db8500_vsmps3
197 - db8500_vrf1
198 - db8500_sva_mmdsp
199 - db8500_sva_mmdsp_ret
200 - db8500_sva_pipe
201 - db8500_sia_mmdsp
202 - db8500_sia_mmdsp_ret
203 - db8500_sia_pipe
204 - db8500_sga
205 - db8500_b2r2_mcde
206 - db8500_esram12
207 - db8500_esram12_ret
208 - db8500_esram34
209 - db8500_esram34_ret
210
211 additionalProperties: false
212
213 patternProperties:
214 "^thermal@[0-9a-f]+$":
215 description: Node describing the DB8500 thermal control functions.
216 This binds to an operating system driver that monitors the
217 temperature of the SoC.
218 type: object
219
220 properties:
221 compatible:
222 const: stericsson,db8500-thermal
223
224 reg:
225 maxItems: 1
226
227 interrupts:
228 items:
229 - description: Hotmon low interrupt (falling temperature)
230 - description: Hotmon high interrupt (rising temperature)
231
232 interrupt-names:
233 items:
234 - const: IRQ_HOTMON_LOW
235 - const: IRQ_HOTMON_HIGH
236
237 '#thermal-sensor-cells':
238 const: 0
239
240 additionalProperties: false
241
242 "^prcmu-timer-4@[0-9a-f]+$":
243 description: Node describing the externally visible timer 4 in the
244 PRCMU block. This timer is interesting to the operating system
245 since even thought it has a very low resolution (32768 Hz) it is
246 always on, and thus provides a consistent monotonic timeline for
247 the system.
248 type: object
249
250 properties:
251 compatible:
252 const: stericsson,db8500-prcmu-timer-4
253
254 reg:
255 maxItems: 1
256
257 additionalProperties: false
258
259 "^ab850[05]$":
260 description: Node describing the Analog Baseband 8500 mixed-signals
261 ASIC AB8500 and subcomponents. The AB8500 is accessed through the
262 PRCMU and hence it appears here. This component has a separate
263 set of devicetree bindings. The AB8505 is a newer version of the
264 same ASIC.
265 type: object
266 $ref: stericsson,ab8500.yaml#
267
268 required:
269 - compatible
270 - reg
271 - '#address-cells'
272 - '#size-cells'
273 - ranges
274 - interrupts
275 - interrupt-controller
276 - '#interrupt-cells'
277 - db8500-prcmu-regulators
278
279 additionalProperties: false
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