ciu3.txt

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    1 * Central Interrupt Unit v3
    2 
    3 Properties:
    4 - compatible: "cavium,octeon-7890-ciu3"
    5 
    6   Compatibility with 78XX and 73XX SOCs.
    7 
    8 - interrupt-controller:  This is an interrupt controller.
    9 
   10 - reg: The base address of the CIU's register bank.
   11 
   12 - #interrupt-cells: Must be <2>.  The first cell is source number.
   13   The second cell indicates the triggering semantics, and may have a
   14   value of either 4 for level semantics, or 1 for edge semantics.
   15 
   16 Example:
   17         interrupt-controller@1010000000000 {
   18                 compatible = "cavium,octeon-7890-ciu3";
   19                 interrupt-controller;
   20                 /* Interrupts are specified by two parts:
   21                  * 1) Source number (20 significant bits)
   22                  * 2) Trigger type: (4 == level, 1 == edge)
   23                  */
   24                 #address-cells = <0>;
   25                 #interrupt-cells = <2>;
   26                 reg = <0x10100 0x00000000 0x0 0xb0000000>;
   27         };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/mips/cavium/ciu3.txt

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sys/contrib/device-tree/Bindings/mips/cavium/ciu3.txt