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     1 * UCTL USB controller glue
    2 
    3 Properties:
    4 - compatible: "cavium,octeon-6335-uctl"
    5 
    6   Compatibility with all cn6XXX SOCs.
    7 
    8 - reg: The base address of the UCTL register bank.
    9 
   10 - #address-cells: Must be <2>.
   11 
   12 - #size-cells: Must be <2>.
   13 
   14 - ranges: Empty to signify direct mapping of the children.
   15 
   16 - refclk-frequency: A single cell containing the reference clock
   17   frequency in Hz.
   18 
   19 - refclk-type: A string describing the reference clock connection
   20   either "crystal" or "external".
   21 
   22 Example:
   23         uctl@118006f000000 {
   24                 compatible = "cavium,octeon-6335-uctl";
   25                 reg = <0x11800 0x6f000000 0x0 0x100>;
   26                 ranges; /* Direct mapping */
   27                 #address-cells = <2>;
   28                 #size-cells = <2>;
   29                 /* 12MHz, 24MHz and 48MHz allowed */
   30                 refclk-frequency = <24000000>;
   31                 /* Either "crystal" or "external" */
   32                 refclk-type = "crystal";
   33 
   34                 ehci@16f0000000000 {
   35                         compatible = "cavium,octeon-6335-ehci","usb-ehci";
   36                         reg = <0x16f00 0x00000000 0x0 0x100>;
   37                         interrupts = <0 56>;
   38                         big-endian-regs;
   39                 };
   40                 ohci@16f0000000400 {
   41                         compatible = "cavium,octeon-6335-ohci","usb-ohci";
   42                         reg = <0x16f00 0x00000400 0x0 0x100>;
   43                         interrupts = <0 56>;
   44                         big-endian-regs;
   45                 };
   46         };
Cache object: 6ff61d7169a8ee778cbb42d66b0eb411 
 
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