fsl-imx-esdhc.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
    8 
    9 maintainers:
   10   - Shawn Guo <shawnguo@kernel.org>
   11 
   12 allOf:
   13   - $ref: "mmc-controller.yaml"
   14 
   15 description: |
   16   The Enhanced Secure Digital Host Controller on Freescale i.MX family
   17   provides an interface for MMC, SD, and SDIO types of memory cards.
   18 
   19   This file documents differences between the core properties described
   20   by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
   21 
   22 properties:
   23   compatible:
   24     oneOf:
   25       - enum:
   26           - fsl,imx25-esdhc
   27           - fsl,imx35-esdhc
   28           - fsl,imx51-esdhc
   29           - fsl,imx53-esdhc
   30           - fsl,imx6q-usdhc
   31           - fsl,imx6sl-usdhc
   32           - fsl,imx6sll-usdhc
   33           - fsl,imx6sx-usdhc
   34           - fsl,imx6ull-usdhc
   35           - fsl,imx7d-usdhc
   36           - fsl,imx7ulp-usdhc
   37           - fsl,imx8mm-usdhc
   38           - fsl,imxrt1050-usdhc
   39           - nxp,s32g2-usdhc
   40       - items:
   41           - enum:
   42               - fsl,imx8mq-usdhc
   43           - const: fsl,imx7d-usdhc
   44       - items:
   45           - enum:
   46               - fsl,imx8mn-usdhc
   47               - fsl,imx8mp-usdhc
   48               - fsl,imx93-usdhc
   49               - fsl,imx8ulp-usdhc
   50           - const: fsl,imx8mm-usdhc
   51       - items:
   52           - enum:
   53               - fsl,imx8qm-usdhc
   54           - const: fsl,imx8qxp-usdhc
   55       - items:
   56           - enum:
   57               - fsl,imx8dxl-usdhc
   58               - fsl,imx8mm-usdhc
   59               - fsl,imx8mn-usdhc
   60               - fsl,imx8mp-usdhc
   61               - fsl,imx8qm-usdhc
   62               - fsl,imx8qxp-usdhc
   63           - const: fsl,imx7d-usdhc
   64         deprecated: true
   65       - items:
   66           - enum:
   67               - fsl,imx8mn-usdhc
   68               - fsl,imx8mp-usdhc
   69           - const: fsl,imx8mm-usdhc
   70           - const: fsl,imx7d-usdhc
   71         deprecated: true
   72       - items:
   73           - enum:
   74               - fsl,imx8qm-usdhc
   75           - const: fsl,imx8qxp-usdhc
   76           - const: fsl,imx7d-usdhc
   77         deprecated: true
   78 
   79   reg:
   80     maxItems: 1
   81 
   82   interrupts:
   83     maxItems: 1
   84 
   85   fsl,wp-controller:
   86     description: |
   87       boolean, if present, indicate to use controller internal write protection.
   88     type: boolean
   89 
   90   fsl,delay-line:
   91     $ref: /schemas/types.yaml#/definitions/uint32
   92     description: |
   93       Specify the number of delay cells for override mode.
   94       This is used to set the clock delay for DLL(Delay Line) on override mode
   95       to select a proper data sampling window in case the clock quality is not good
   96       due to signal path is too long on the board. Please refer to eSDHC/uSDHC
   97       chapter, DLL (Delay Line) section in RM for details.
   98     default: 0
   99 
  100   voltage-ranges:
  101     $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
  102     description: |
  103       Specify the voltage range in case there are software transparent level
  104       shifters on the outputs of the controller. Two cells are required, first
  105       cell specifies minimum slot voltage (mV), second cell specifies maximum
  106       slot voltage (mV).
  107     items:
  108       items:
  109         - description: value for minimum slot voltage
  110         - description: value for maximum slot voltage
  111     maxItems: 1
  112 
  113   fsl,tuning-start-tap:
  114     $ref: /schemas/types.yaml#/definitions/uint32
  115     description: |
  116       Specify the start delay cell point when send first CMD19 in tuning procedure.
  117     default: 0
  118 
  119   fsl,tuning-step:
  120     $ref: /schemas/types.yaml#/definitions/uint32
  121     description: |
  122       Specify the increasing delay cell steps in tuning procedure.
  123       The uSDHC use one delay cell as default increasing step to do tuning process.
  124       This property allows user to change the tuning step to more than one delay
  125       cells which is useful for some special boards or cards when the default
  126       tuning step can't find the proper delay window within limited tuning retries.
  127     default: 0
  128 
  129   fsl,strobe-dll-delay-target:
  130     $ref: /schemas/types.yaml#/definitions/uint32
  131     description: |
  132       Specify the strobe dll control slave delay target.
  133       This delay target programming host controller loopback read clock, and this
  134       property allows user to change the delay target for the strobe input read clock.
  135       If not use this property, driver default set the delay target to value 7.
  136       Only eMMC HS400 mode need to take care of this property.
  137     default: 0
  138 
  139   clocks:
  140     maxItems: 3
  141     description:
  142       Handle clocks for the sdhc controller.
  143 
  144   clock-names:
  145     items:
  146       - const: ipg
  147       - const: ahb
  148       - const: per
  149 
  150   power-domains:
  151     maxItems: 1
  152 
  153   pinctrl-names:
  154     oneOf:
  155       - minItems: 3
  156         items:
  157           - const: default
  158           - const: state_100mhz
  159           - const: state_200mhz
  160           - const: sleep
  161       - minItems: 1
  162         items:
  163           - const: default
  164           - const: sleep
  165 
  166 required:
  167   - compatible
  168   - reg
  169   - interrupts
  170 
  171 unevaluatedProperties: false
  172 
  173 examples:
  174   - |
  175     mmc@70004000 {
  176         compatible = "fsl,imx51-esdhc";
  177         reg = <0x70004000 0x4000>;
  178         interrupts = <1>;
  179         fsl,wp-controller;
  180     };
  181 
  182     mmc@70008000 {
  183         compatible = "fsl,imx51-esdhc";
  184         reg = <0x70008000 0x4000>;
  185         interrupts = <2>;
  186         cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
  187         wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
  188     };

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FreeBSD/Linux Kernel Cross Reference sys/contrib/device-tree/Bindings/mmc/fsl-imx-esdhc.yaml

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sys/contrib/device-tree/Bindings/mmc/fsl-imx-esdhc.yaml