1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Rockchip designware mobile storage host controller device tree bindings
8
9 description:
10 Rockchip uses the Synopsys designware mobile storage host controller
11 to interface a SoC with storage medium such as eMMC or SD/MMC cards.
12 This file documents the combined properties for the core Synopsys dw mshc
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
14 file and the Rockchip specific extensions.
15
16 allOf:
17 - $ref: "synopsys-dw-mshc-common.yaml#"
18
19 maintainers:
20 - Heiko Stuebner <heiko@sntech.de>
21
22 # Everything else is described in the common file
23 properties:
24 compatible:
25 oneOf:
26 # for Rockchip RK2928 and before RK3288
27 - const: rockchip,rk2928-dw-mshc
28 # for Rockchip RK3288
29 - const: rockchip,rk3288-dw-mshc
30 - items:
31 - enum:
32 - rockchip,px30-dw-mshc
33 - rockchip,rk1808-dw-mshc
34 - rockchip,rk3036-dw-mshc
35 - rockchip,rk3228-dw-mshc
36 - rockchip,rk3308-dw-mshc
37 - rockchip,rk3328-dw-mshc
38 - rockchip,rk3368-dw-mshc
39 - rockchip,rk3399-dw-mshc
40 - rockchip,rk3568-dw-mshc
41 - rockchip,rv1108-dw-mshc
42 - rockchip,rv1126-dw-mshc
43 - const: rockchip,rk3288-dw-mshc
44
45 reg:
46 maxItems: 1
47
48 interrupts:
49 maxItems: 1
50
51 clocks:
52 minItems: 2
53 maxItems: 4
54 description:
55 Handle to "biu" and "ciu" clocks for the bus interface unit clock and
56 the card interface unit clock. If "ciu-drive" and "ciu-sample" are
57 specified in clock-names, it should also contain
58 handles to these clocks.
59
60 clock-names:
61 minItems: 2
62 items:
63 - const: biu
64 - const: ciu
65 - const: ciu-drive
66 - const: ciu-sample
67 description:
68 Apart from the clock-names "biu" and "ciu" two more clocks
69 "ciu-drive" and "ciu-sample" are supported. They are used
70 to control the clock phases, "ciu-sample" is required for tuning
71 high speed modes.
72
73 rockchip,default-sample-phase:
74 $ref: /schemas/types.yaml#/definitions/uint32
75 minimum: 0
76 maximum: 360
77 default: 0
78 description:
79 The default phase to set "ciu-sample" at probing,
80 low speeds or in case where all phases work at tuning time.
81 If not specified 0 deg will be used.
82
83 rockchip,desired-num-phases:
84 $ref: /schemas/types.yaml#/definitions/uint32
85 minimum: 0
86 maximum: 360
87 default: 360
88 description:
89 The desired number of times that the host execute tuning when needed.
90 If not specified, the host will do tuning for 360 times,
91 namely tuning for each degree.
92
93 required:
94 - compatible
95 - reg
96 - interrupts
97 - clocks
98 - clock-names
99
100 unevaluatedProperties: false
101
102 examples:
103 - |
104 #include <dt-bindings/clock/rk3288-cru.h>
105 #include <dt-bindings/interrupt-controller/arm-gic.h>
106 #include <dt-bindings/interrupt-controller/irq.h>
107 sdmmc: mmc@ff0c0000 {
108 compatible = "rockchip,rk3288-dw-mshc";
109 reg = <0xff0c0000 0x4000>;
110 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
111 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
112 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
113 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
114 resets = <&cru SRST_MMC0>;
115 reset-names = "reset";
116 fifo-depth = <0x100>;
117 max-frequency = <150000000>;
118 };
119
120 ...
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