1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Synopsys Designware Mobile Storage Host Controller Binding
8
9 allOf:
10 - $ref: "synopsys-dw-mshc-common.yaml#"
11
12 maintainers:
13 - Ulf Hansson <ulf.hansson@linaro.org>
14
15 # Everything else is described in the common file
16 properties:
17 compatible:
18 enum:
19 - altr,socfpga-dw-mshc
20 - img,pistachio-dw-mshc
21 - snps,dw-mshc
22
23 reg:
24 maxItems: 1
25
26 interrupts:
27 maxItems: 1
28
29 clocks:
30 minItems: 2
31 maxItems: 2
32 description:
33 Handle to "biu" and "ciu" clocks for the
34 bus interface unit clock and the card interface unit clock.
35
36 clock-names:
37 items:
38 - const: biu
39 - const: ciu
40
41 required:
42 - compatible
43 - reg
44 - interrupts
45 - clocks
46 - clock-names
47
48 unevaluatedProperties: false
49
50 examples:
51 - |
52 mmc@12200000 {
53 compatible = "snps,dw-mshc";
54 reg = <0x12200000 0x1000>;
55 interrupts = <0 75 0>;
56 clocks = <&clock 351>, <&clock 132>;
57 clock-names = "biu", "ciu";
58 dmas = <&pdma 12>;
59 dma-names = "rx-tx";
60 resets = <&rst 20>;
61 reset-names = "reset";
62 vmmc-supply = <&buck8>;
63 #address-cells = <1>;
64 #size-cells = <0>;
65 broken-cd;
66 bus-width = <8>;
67 cap-mmc-highspeed;
68 cap-sd-highspeed;
69 card-detect-delay = <200>;
70 max-frequency = <200000000>;
71 clock-frequency = <400000000>;
72 data-addr = <0x200>;
73 fifo-depth = <0x80>;
74 fifo-watermark-aligned;
75 };
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