1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Ingenic SoCs NAND controller devicetree bindings
8
9 maintainers:
10 - Paul Cercueil <paul@crapouillou.net>
11
12 allOf:
13 - $ref: nand-controller.yaml#
14 - $ref: /schemas/memory-controllers/ingenic,nemc-peripherals.yaml#
15
16 properties:
17 compatible:
18 enum:
19 - ingenic,jz4740-nand
20 - ingenic,jz4725b-nand
21 - ingenic,jz4780-nand
22
23 reg:
24 items:
25 - description: Bank number, offset and size of first attached NAND chip
26 - description: Bank number, offset and size of second attached NAND chip
27 - description: Bank number, offset and size of third attached NAND chip
28 - description: Bank number, offset and size of fourth attached NAND chip
29 minItems: 1
30
31 ecc-engine: true
32
33 partitions:
34 type: object
35 description:
36 Node containing description of fixed partitions.
37 See Documentation/devicetree/bindings/mtd/partition.txt
38
39 patternProperties:
40 "^nand@[a-f0-9]$":
41 type: object
42 properties:
43 rb-gpios:
44 description: GPIO specifier for the busy pin.
45 maxItems: 1
46
47 wp-gpios:
48 description: GPIO specifier for the write-protect pin.
49 maxItems: 1
50
51 required:
52 - compatible
53 - reg
54
55 unevaluatedProperties: false
56
57 examples:
58 - |
59 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
60 memory-controller@13410000 {
61 compatible = "ingenic,jz4780-nemc";
62 reg = <0x13410000 0x10000>;
63 #address-cells = <2>;
64 #size-cells = <1>;
65 ranges = <1 0 0x1b000000 0x1000000>,
66 <2 0 0x1a000000 0x1000000>,
67 <3 0 0x19000000 0x1000000>,
68 <4 0 0x18000000 0x1000000>,
69 <5 0 0x17000000 0x1000000>,
70 <6 0 0x16000000 0x1000000>;
71
72 clocks = <&cgu JZ4780_CLK_NEMC>;
73
74 nand-controller@1 {
75 compatible = "ingenic,jz4780-nand";
76 reg = <1 0 0x1000000>;
77
78 #address-cells = <1>;
79 #size-cells = <0>;
80
81 ecc-engine = <&bch>;
82
83 ingenic,nemc-tAS = <10>;
84 ingenic,nemc-tAH = <5>;
85 ingenic,nemc-tBP = <10>;
86 ingenic,nemc-tAW = <15>;
87 ingenic,nemc-tSTRV = <100>;
88
89 pinctrl-names = "default";
90 pinctrl-0 = <&pins_nemc>;
91
92 nand@1 {
93 reg = <1>;
94
95 nand-ecc-step-size = <1024>;
96 nand-ecc-strength = <24>;
97 nand-ecc-mode = "hw";
98 nand-on-flash-bbt;
99
100 pinctrl-names = "default";
101 pinctrl-0 = <&pins_nemc_cs1>;
102
103 partitions {
104 compatible = "fixed-partitions";
105 #address-cells = <2>;
106 #size-cells = <2>;
107
108 partition@0 {
109 label = "u-boot-spl";
110 reg = <0x0 0x0 0x0 0x800000>;
111 };
112
113 partition@800000 {
114 label = "u-boot";
115 reg = <0x0 0x800000 0x0 0x200000>;
116 };
117
118 partition@a00000 {
119 label = "u-boot-env";
120 reg = <0x0 0xa00000 0x0 0x200000>;
121 };
122
123 partition@c00000 {
124 label = "boot";
125 reg = <0x0 0xc00000 0x0 0x4000000>;
126 };
127
128 partition@4c00000 {
129 label = "system";
130 reg = <0x0 0x4c00000 0x1 0xfb400000>;
131 };
132 };
133 };
134 };
135 };
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