The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/mtd/ti,gpmc-nand.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Texas Instruments GPMC NAND Flash controller.
    8 
    9 maintainers:
   10   - Tony Lindgren <tony@atomide.com>
   11   - Roger Quadros <rogerq@kernel.org>
   12 
   13 description:
   14   GPMC NAND controller/Flash is represented as a child of the
   15   GPMC controller node.
   16 
   17 properties:
   18   compatible:
   19     items:
   20       - enum:
   21           - ti,am64-nand
   22           - ti,omap2-nand
   23 
   24   reg:
   25     maxItems: 1
   26 
   27   interrupts:
   28     items:
   29       - description: Interrupt for fifoevent
   30       - description: Interrupt for termcount
   31 
   32   "#address-cells": true
   33 
   34   "#size-cells": true
   35 
   36   ti,nand-ecc-opt:
   37     description: Desired ECC algorithm
   38     $ref: /schemas/types.yaml#/definitions/string
   39     enum: [sw, ham1, bch4, bch8, bch16]
   40 
   41   ti,nand-xfer-type:
   42     description: Data transfer method between controller and chip.
   43     $ref: /schemas/types.yaml#/definitions/string
   44     enum: [prefetch-polled, polled, prefetch-dma, prefetch-irq]
   45     default: prefetch-polled
   46 
   47   ti,elm-id:
   48     description:
   49       phandle to the ELM (Error Location Module).
   50     $ref: /schemas/types.yaml#/definitions/phandle
   51 
   52   nand-bus-width:
   53     description:
   54       Bus width to the NAND chip
   55     $ref: /schemas/types.yaml#/definitions/uint32
   56     enum: [8, 16]
   57     default: 8
   58 
   59   rb-gpios:
   60     description:
   61       GPIO connection to R/B signal from NAND chip
   62     maxItems: 1
   63 
   64 patternProperties:
   65   "@[0-9a-f]+$":
   66     $ref: "/schemas/mtd/partitions/partition.yaml"
   67 
   68 allOf:
   69   - $ref: "/schemas/memory-controllers/ti,gpmc-child.yaml"
   70 
   71 required:
   72   - compatible
   73   - reg
   74   - ti,nand-ecc-opt
   75 
   76 unevaluatedProperties: false
   77 
   78 examples:
   79   - |
   80     #include <dt-bindings/interrupt-controller/arm-gic.h>
   81     #include <dt-bindings/gpio/gpio.h>
   82 
   83     gpmc: memory-controller@50000000 {
   84       compatible = "ti,am3352-gpmc";
   85       dmas = <&edma 52 0>;
   86       dma-names = "rxtx";
   87       clocks = <&l3s_gclk>;
   88       clock-names = "fck";
   89       reg = <0x50000000 0x2000>;
   90       interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
   91       gpmc,num-cs = <7>;
   92       gpmc,num-waitpins = <2>;
   93       #address-cells = <2>;
   94       #size-cells = <1>;
   95       interrupt-controller;
   96       #interrupt-cells = <2>;
   97       gpio-controller;
   98       #gpio-cells = <2>;
   99 
  100       ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
  101       nand@0,0 {
  102         compatible = "ti,omap2-nand";
  103         reg = <0 0 4>;          /* device IO registers */
  104         interrupt-parent = <&gpmc>;
  105         interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  106                      <1 IRQ_TYPE_NONE>; /* termcount */
  107         ti,nand-xfer-type = "prefetch-dma";
  108         ti,nand-ecc-opt = "bch16";
  109         ti,elm-id = <&elm>;
  110         #address-cells = <1>;
  111         #size-cells = <1>;
  112 
  113         /* NAND generic properties */
  114         nand-bus-width = <8>;
  115         rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;  /* gpmc_wait0 */
  116 
  117         /* GPMC properties*/
  118         gpmc,device-width = <1>;
  119 
  120         partition@0 {
  121           label = "NAND.SPL";
  122           reg = <0x00000000 0x00040000>;
  123         };
  124         partition@1 {
  125           label = "NAND.SPL.backup1";
  126           reg = <0x00040000 0x00040000>;
  127         };
  128       };
  129     };

Cache object: 0c50cf613ff13bc6d994ee538d7f91b9


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