The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/net/can/mpc5xxx-mscan.txt

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    1 CAN Device Tree Bindings
    2 ------------------------
    3 
    4 (c) 2006-2009 Secret Lab Technologies Ltd
    5 Grant Likely <grant.likely@secretlab.ca>
    6 
    7 fsl,mpc5200-mscan nodes
    8 -----------------------
    9 In addition to the required compatible-, reg- and interrupt-properties, you can
   10 also specify which clock source shall be used for the controller:
   11 
   12 - fsl,mscan-clock-source : a string describing the clock source. Valid values
   13                            are: "ip" for ip bus clock
   14                                  "ref" for reference clock (XTAL)
   15                            "ref" is default in case this property is not
   16                            present.
   17 
   18 fsl,mpc5121-mscan nodes
   19 -----------------------
   20 In addition to the required compatible-, reg- and interrupt-properties, you can
   21 also specify which clock source and divider shall be used for the controller:
   22 
   23 - fsl,mscan-clock-source : a string describing the clock source. Valid values
   24                            are: "ip" for ip bus clock
   25                                 "ref" for reference clock
   26                                 "sys" for system clock
   27                            If this property is not present, an optimal CAN
   28                            clock source and frequency based on the system
   29                            clock will be selected. If this is not possible,
   30                            the reference clock will be used.
   31 
   32 - fsl,mscan-clock-divider: for the reference and system clock, an additional
   33                            clock divider can be specified. By default, a
   34                            value of 1 is used.
   35 
   36 Note that the MPC5121 Rev. 1 processor is not supported.
   37 
   38 Examples:
   39         can@1300 {
   40                 compatible = "fsl,mpc5121-mscan";
   41                 interrupts = <12 0x8>;
   42                 interrupt-parent = <&ipic>;
   43                 reg = <0x1300 0x80>;
   44         };
   45 
   46         can@1380 {
   47                 compatible = "fsl,mpc5121-mscan";
   48                 interrupts = <13 0x8>;
   49                 interrupt-parent = <&ipic>;
   50                 reg = <0x1380 0x80>;
   51                 fsl,mscan-clock-source = "ref";
   52                 fsl,mscan-clock-divider = <3>;
   53         };

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