The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/contrib/device-tree/Bindings/net/can/nxp,sja1000.yaml

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    1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    2 %YAML 1.2
    3 ---
    4 $id: http://devicetree.org/schemas/net/can/nxp,sja1000.yaml#
    5 $schema: http://devicetree.org/meta-schemas/core.yaml#
    6 
    7 title: Memory mapped SJA1000 CAN controller from NXP (formerly Philips)
    8 
    9 maintainers:
   10   - Wolfgang Grandegger <wg@grandegger.com>
   11 
   12 properties:
   13   compatible:
   14     oneOf:
   15       - enum:
   16           - nxp,sja1000
   17           - technologic,sja1000
   18       - items:
   19           - enum:
   20               - renesas,r9a06g032-sja1000 # RZ/N1D
   21               - renesas,r9a06g033-sja1000 # RZ/N1S
   22           - const: renesas,rzn1-sja1000 # RZ/N1
   23 
   24   reg:
   25     maxItems: 1
   26 
   27   interrupts:
   28     maxItems: 1
   29 
   30   clocks:
   31     maxItems: 1
   32 
   33   reg-io-width:
   34     $ref: /schemas/types.yaml#/definitions/uint32
   35     description: I/O register width (in bytes) implemented by this device
   36     default: 1
   37     enum: [ 1, 2, 4 ]
   38 
   39   nxp,external-clock-frequency:
   40     $ref: /schemas/types.yaml#/definitions/uint32
   41     default: 16000000
   42     description: |
   43       Frequency of the external oscillator clock in Hz.
   44       The internal clock frequency used by the SJA1000 is half of that value.
   45 
   46   nxp,tx-output-mode:
   47     $ref: /schemas/types.yaml#/definitions/uint32
   48     enum: [ 0, 1, 2, 3 ]
   49     default: 1
   50     description: |
   51       operation mode of the TX output control logic. Valid values are:
   52         <0> : bi-phase output mode
   53         <1> : normal output mode (default)
   54         <2> : test output mode
   55         <3> : clock output mode
   56 
   57   nxp,tx-output-config:
   58     $ref: /schemas/types.yaml#/definitions/uint32
   59     default: 0x02
   60     description: |
   61       TX output pin configuration. Valid values are any one of the below
   62       or combination of TX0 and TX1:
   63         <0x01> : TX0 invert
   64         <0x02> : TX0 pull-down (default)
   65         <0x04> : TX0 pull-up
   66         <0x06> : TX0 push-pull
   67         <0x08> : TX1 invert
   68         <0x10> : TX1 pull-down
   69         <0x20> : TX1 pull-up
   70         <0x30> : TX1 push-pull
   71 
   72   nxp,clock-out-frequency:
   73     $ref: /schemas/types.yaml#/definitions/uint32
   74     description: |
   75       clock frequency in Hz on the CLKOUT pin.
   76       If not specified or if the specified value is 0, the CLKOUT pin
   77       will be disabled.
   78 
   79   nxp,no-comparator-bypass:
   80     type: boolean
   81     description: Allows to disable the CAN input comparator.
   82 
   83 required:
   84   - compatible
   85   - reg
   86   - interrupts
   87 
   88 allOf:
   89   - $ref: can-controller.yaml#
   90   - if:
   91       properties:
   92         compatible:
   93           contains:
   94             enum:
   95               - technologic,sja1000
   96               - renesas,rzn1-sja1000
   97     then:
   98       required:
   99         - reg-io-width
  100   - if:
  101       properties:
  102         compatible:
  103           contains:
  104             const: renesas,rzn1-sja1000
  105     then:
  106       required:
  107         - clocks
  108 
  109 unevaluatedProperties: false
  110 
  111 examples:
  112   - |
  113     can@1a000 {
  114         compatible = "technologic,sja1000";
  115         reg = <0x1a000 0x100>;
  116         interrupts = <1>;
  117         reg-io-width = <2>;
  118         nxp,tx-output-config = <0x06>;
  119         nxp,external-clock-frequency = <24000000>;
  120     };
  121 
  122   - |
  123     #include <dt-bindings/interrupt-controller/arm-gic.h>
  124     #include <dt-bindings/clock/r9a06g032-sysctrl.h>
  125 
  126     can@52104000 {
  127         compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";
  128         reg = <0x52104000 0x800>;
  129         reg-io-width = <4>;
  130         interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
  131         clocks = <&sysctrl R9A06G032_HCLK_CAN0>;
  132     };

Cache object: 82dd4d66f36483ff200463a97a86f0b5


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